Results 181 to 190 of about 3,169,862 (288)

Advancing non-faradaic impedance biosensors: sensitivity enhancement strategies using microfluidics, multiscale labeling, and CMOS technology. [PDF]

Microsyst Nanoeng
Kim NS, Kim J.
europepmc   +1 more source

A Memristor‐Based In‐Memory Computing System‐on‐Chip with Efficient Depthwise Convolution

Advanced Intelligent Systems, EarlyView.
We present a memristor‐based in‐memory computing (IMC) architecture that enables efficient depthwise convolution (DWC) acceleration. Fabricated in a system‐on‐chip with crossbar arrays, the design improves memory utilization. Experimental validation demonstrates the first hardware acceleration of DWC in IMC, achieving a digital comparable inference ...
Wenhao Song, Fuxi Cai, Sangsu Park, Zhaoyan Li, Seonghun Lee, Mingyi Rao, Woohyung Choi, Seungin Shin, Yan Zhu, Sujin Chae, Myoungsub Kim, Mingche Wu, Hyejung Choi, Yuan Dao, Jaeyun Yi, Youngman Cho, Seon Yong Cha, Ning Ge, Qiangfei Xia, Soo Gil Kim, Miao Hu, J. Joshua Yang   +21 more
wiley   +1 more source

MRAM: A Versatile Non-Volatile Memory for Next-Generation Computing. [PDF]

Nanomaterials (Basel)
Wang Z, Li H, Jiang S.
europepmc   +1 more source

Exploiting Ferroelectric and Spintronic Dynamics for Neural Network Computation

Advanced Intelligent Systems, EarlyView.
Ferroelectric and spintronic devices, relying on the control of polarization and magnetization, offer intrinsically fast, durable, energy‐efficient, and low‐latency building blocks for analog in‐memory computing. The hysteretic dynamics of an order parameter are leveraged to provide nonvolatile, multistate memory and nonlinear switching. Brain‐inspired
Dashiell Harrison, Kevin Nadaud, Josquin Harrison, Guillaume F. Nataf, Laura Bégon‐Lours   +4 more
wiley   +1 more source

Temperature-Resilient Reconfigurable Physical Unclonable Function Driven by Pulse Modulation Using CMOS-Integrated Spintronic Chips. [PDF]

Adv Sci (Weinh)
Wang M, Jiang C, Wang Z, Hou Z, Zhang Z, Zhao Y, Liu HX, Zhao W.   +7 more
europepmc   +1 more source

Projeto de amplificadores operacionais CMOS utilizando transistores compostos em "sea-of-transistors" [PDF]

, 1997
Acosta, Sandra Massulini
core  

Physics‐Grounded Probabilistic Bits for Hardware‐Efficient Intelligent Inference and Optimization

Advanced Intelligent Systems, EarlyView.
Si–SiNx interface traps are harnessed as a complementary metal–oxide–semiconductor‐compatible source of controllable randomness for probabilistic bits. Pulse‐width‐programmed stochastic capture converts nanoscale defect dynamics into Boltzmann‐consistent binary outputs, while a physics‐based Simulation Program with Integrated Circuit Emphasis model ...
Dokyoung Lee, Jun‐Young Park, Joon‐Kyu Han, Sungho Kim   +3 more
wiley   +1 more source

Design of electronically tunable fractional-order elements based on distributed MOS transistor structures. [PDF]

Sci Rep
Kubanek D, Shadrin A, Dvorak J, Jerabek J, Seda P, Sotner R, Kledrowetz V, Christie C, Freeborn TJ, Ushakov PA.   +9 more
europepmc   +1 more source

Energy‐Aware Perturbation Optimization for Memristor‐Array Convolutional Neural Networks

Advanced Intelligent Systems, EarlyView.
Memristor‐array inference becomes more energy efficient when layer inputs are reshaped before computation. Sinusoidal perturbation encoding with dual‐threshold screening reduces active voltage pulses and contracts ADC input‐current ranges, jointly lowering crossbar and peripheral energy while preserving accuracy across hardware MNIST validation, deep ...
Ao Xu, Lun Lu, Youpeng Wu, Yao Guo, Yi Li, Yinan Wang, Qingjiang Li   +6 more
wiley   +1 more source

Privacy-preserving data analysis using a memristor chip with colocated authentication and processing. [PDF]

Sci Adv
Liu Z, Wang Z, Ding C, Lin B, Tang J, Gao B, Wong N, Wu H.   +7 more
europepmc   +1 more source