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A Monolithic CMOS-MEMS SoC with 1.8 mm/s and 2 mK Resolution for Flow and Temperature Sensing via a Microcantilever Array. [PDF]

Microsyst Nanoeng
Wang F, Ouyang X, Hong L, Song X, Xu W.
europepmc   +1 more source

Si-doped CsSrI₃ perovskites as potential dielectrics in MIM capacitors: recent advances, limitations and prospects. [PDF]

RSC Adv
Itas YS, Khandaker MU, Haldhar R, Alrahili MR.   +3 more
europepmc   +1 more source

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Modeling Latch-Up in CMOS Integrated Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1982
Latch-up is a common problem in CMOS integrated circuits. The modeling of latch-up with circuit simulation programs is addressed in this paper. The general features of a lumped element latch-up model are discussed along with a step-by-step approach to the component determination of the model.
Donald B. Estreich, Robert W. Dutton
exaly   +2 more sources

Latch-Up in CMOS Integrated Circuits

IEEE Transactions on Nuclear Science, 1973
The parasitic transistors and pnpn paths present on junction-isolated CMOS circuits have been identified and studied quantitatively. Active SCR structures exist which can be triggered electrically or by a radiation pulse. Detailed studies of SCR paths have been performed on two circuits, the CD4007A and the CD4041A, to relate geometrical and materials ...
B. L. Gregory, B. D. Shafer
exaly   +2 more sources

The Design of CMOS Radio-Frequency Integrated Circuits

Microelectronics International, 2004
exaly   +6 more sources

Paths to terahertz CMOS integrated circuits

2009 IEEE Custom Integrated Circuits Conference, 2009
A 140-GHz fundamental mode VCO in 90-nm CMOS and a 410-GHz push-push VCO in 45-nm CMOS, and a 125-GHz Schottky diode frequency doubler, a 50-GHz phase locked loop with a frequency doubled output at 100 GHz, a 180-GHz Schottky diode detector and a 700-GHz plasma wave detector in 130-nm CMOS have been demonstrated. Based on these, paths to terahertz CMOS
Dongha Shim, Chuying Mao, Ruonan Han 0001, Swaminathan Sankaran, Eunyoung Seok, Changhua Cao, Wojciech Knap, Kenneth K. O   +7 more
openaire   +3 more sources

Reliability of CMOS Integrated Circuits

Computer, 1978
CMOS IC s are being produced using a variety of processes, and considerable data is now available on their reliability and failure mechanisms.
George L. Schnable, Larry J. Gallace, Henry L. Pujol   +2 more
openaire   +1 more source

CMOS integrated circuit reliability

Microelectronics Reliability, 1981
Abstract This paper summarizes recently published data on CMOS integrated circuit failure rates, and provides information on the effects of voltage, temperature, device complexity, and packaging on CMOS failure rates. Other factors which can affect failure rate are also indicated, including designs, materials, processes, in-process controls ...
George L. Schnable, Robert B. Comizzoli
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Josephson-CMOS integrated circuits

Proceedings of 1994 IEEE International Electron Devices Meeting, 2002
We report the development of the first-ever monolithically integrated Josephson-CMOS circuits for digital memory, detector, and magnetometry applications at 4 K. The technology combines a 1.2 /spl mu/m dual-poly, n-well CMOS process, and a Nb/AlO/sub x/Nb trilayer process yielding Josephson junctions with critical current densities of 0.4-0.8 kA/cm/sup
U. Ghoshal, D. Hebert, T. Van Duzer
openaire   +1 more source