Results 241 to 250 of about 482,540 (308)

Common-Mode Voltage Reduction and Fault-Tolerant Operation of Four-Leg CSI-Fed Motor Drives

IEEE transactions on power electronics, 2021
This letter proposes a four-leg current-source inverter (CSI) fed three-phase motor drive. Different from the previous four-leg CSI inverter, the proposed configuration introduces the fourth leg in CSI, which connects to the neutral point of the motor ...
Yang Xu, Z. Wang, Chuhan Li, Jiangbiao He   +3 more
semanticscholar   +1 more source

Model Predictive Control With Reduced Common-Mode Voltage Based on Optimal Switching Sequences for Nested Neutral Point Clamped Inverter

IEEE transactions on industrial electronics (1982. Print)
This article proposes a new model predictive control strategy with reduced common-mode voltage (CMV) based on optimal switching sequences (OSS-MPC) for a three-phase (3PH) four-level nested neutral point clamped (4L-NNPC) inverter.
K. K. Monfared, H. Iman‐Eini, Y. Neyshabouri, M. Liserre   +3 more
semanticscholar   +1 more source

Model-Predictive Current Control Scheme for Seven-Phase Voltage-Source Inverter With Reduced Common-Mode Voltage and Current Harmonics

IEEE Journal of Emerging and Selected Topics in Power Electronics, 2021
This article presents a simple model-predictive current control (MPCC) scheme to reduce both the common-mode voltage (CMV) and current harmonics for a two-level seven-phase voltage-source inverter (VSI).
Huu-Cong Vu, Hong‐Hee Lee
semanticscholar   +1 more source

Virtual Space Vector Overmodulation Strategy for NPC Three-Level Inverters With Common-Mode Voltage Suppression

IEEE transactions on power electronics
To improve the utilization of the dc-bus voltage and solve the problem of neutral-point voltage (NP-V) unbalance and high common-mode voltage (CMV) in the overmodulation region of three-level neutral-point clamped inverters, a virtual space vector ...
Zhixun Ma, Haichuan Niu, Xu Zhang, Xiang Wu, Xinbo Cai   +4 more
semanticscholar   +1 more source

Delta-Sigma Modulation Based Common-Mode Voltage Elimination in Direct Matrix Converter

IEEE Transactions on Industrial Informatics, 2021
The direct matrix converter (DMC) offers a compact and robust solution over typical ac–dc–ac converter, by enabling direct ac–ac power conversion without any energy storage requirements.
T. N. Mir, Bhim Singh, A. H. Bhat
semanticscholar   +1 more source

Fourth-Arm Common-Mode Voltage Mitigation

IEEE Transactions on Power Electronics, 2016
The adverse effect of common-mode voltage (CMV) in pulse-width modulation inverters is widely acknowledged. Various approaches for mitigating CMV effect in PWM inverters have been proposed in the literature but they either show limited effect or impair the utilization of the drive.
Kfir J. Dagan, Adrian Zuckerberger, Raul Rabinovici   +2 more
openaire   +1 more source

A DPWM Modulation Strategy to Reduce Common-Mode Voltage for Indirect Matrix Converters Based on Active-Current Vector Amplitude Characteristics

IEEE transactions on industrial electronics (1982. Print), 2021
Based on the characteristics that the amplitude of active-current vector in the rectifier stage is zero when the zero-voltage vector is used in the inverter stage, and any one from the six active-current vectors can be selected, a novel discontinuous ...
Shanhu Li, Wensheng Wang, Xu-hao Han, Xu Liu   +3 more
semanticscholar   +1 more source

Mitigation of common-mode voltage in matrix converter

3rd IET International Conference on Power Electronics, Machines and Drives (PEMD 2006), 2006
This paper presents a new modulation scheme for matrix converters. With the proposed method, the peak common mode voltage is reduced to 1/√3 of the input phase voltage amplitude; at least 2/3 reduction in the high order harmonics and 1/3 in RMS value are realised. Indirect space vector modulation is adopted and modified.
null Fan Yue, P.W. Wheeler, J.C. Clare
openaire   +1 more source

Paralleled inverters with zero common-mode voltage

2016 IEEE Energy Conversion Congress and Exposition (ECCE), 2016
This paper introduces a PWM method for paralleled inverters which can achieve zero common-mode voltage. The paralleled inverters are connected through coupling inductors to the load. Based on the voltage vectors in each inverter, paralleled voltage vectors are proposed to combine the reference voltage.
Dong Jiang, Zewei Shen
openaire   +1 more source

Design of Active Common Mode Noise Voltage Canceler for SiC Inverter Fed Induction Motor Drive with Reduced Common Mode Voltage PWM

2020 IEEE 29th International Symposium on Industrial Electronics (ISIE), 2020
This paper presents the design of active common mode noise voltage canceler (ACVC) for induction motor drive with active zero vector pulse width modulation (AZPWM-1). Conventional pulse width modulation (PWM) like space vector pulse width modulation (SVPWM) has a peak to peak (PP) value of common mode voltage (CMV) equal to the DC link voltage ...
Manish Kumar, Kalaiselvi Jayaraman
openaire   +1 more source