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Common-Mode Noise Reduction in Phase-Shifted Full-Bridge Converter by Common-Mode Voltage Cancellation

2020 IEEE 9th International Power Electronics and Motion Control Conference (IPEMC2020-ECCE Asia), 2020
Full-bridge (FB) converter is a widely adopted topology in medium-to-high power conversion applications, and soft switching can be realized with phase-shifted control to achieve high efficiency. As the diagonal switches turns on (off) at different time, the displacement current flowing through associated parasitic capacitances (including the ...
Lihong Xie   +3 more
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Choppers for High Input Common-Mode Voltages

2016
As described in Chaps. 1 and 3, capacitively coupled chopper amplifiers can potentially achieve an input CMVR equal to the breakdown voltage of their input capacitors.
Qinwen Fan   +2 more
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Reduction of common mode voltage using multilevel inverter

2016 International Conference on Energy Efficient Technologies for Sustainability (ICEETS), 2016
In this paper, a direction to reduce common-mode voltage (CMV) at the output of multilevel inverters (MLI) using a sinusoidal pulse width modulation (SPWM) technique is discuss. As SPWM technique does not require computations therefore, it is easy to implement in digital controllers. This paper makes the simulation implementation of a SPWM technique to
Aniruddha V. Jadhav, P. V. Kapoor
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Test buffer with extended common mode input voltage

Melecon 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference, 2010
The paper presents an adequate buffer for testing integrated circuits. The buffer operation is based on changing the DC level of the incoming signal to a reference common mode voltage REF V with an error of 0.003% for a large domain of common mode input voltages.
Cojan Nicolae   +2 more
openaire   +1 more source

Common mode stability in fully differential voltage feedback CMOS amplifiers

10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003, 2004
In this study consideration is made of the common mode (CM) behavior of two-stage fully differential amplifiers in voltage feedback (FB) connection. In particular, the interaction between internal CMFB circuitry and the external feedback network is investigated in order to highlight a possible operating point instability condition, due to the presence ...
Tauro, A.   +3 more
openaire   +1 more source

An approach to reduce common-mode voltage in matrix converter

IEEE Transactions on Industry Applications, 2003
In this paper, an approach to reduce common-mode voltage at the output of a matrix converter is discussed. A new modulation strategy which reduces the common-mode voltage at the output is presented. The proposed method maintains the active voltage vector and distributes zero vector equally within a sampling period and reduces square RMS of ripple ...
null Han Ju Cha, P.N. Enjeti
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Design of Active Common Mode Noise Voltage Canceler for SiC Inverter Fed Induction Motor Drive with Reduced Common Mode Voltage PWM

2020 IEEE 29th International Symposium on Industrial Electronics (ISIE), 2020
This paper presents the design of active common mode noise voltage canceler (ACVC) for induction motor drive with active zero vector pulse width modulation (AZPWM-1). Conventional pulse width modulation (PWM) like space vector pulse width modulation (SVPWM) has a peak to peak (PP) value of common mode voltage (CMV) equal to the DC link voltage ...
Manish Kumar, Kalaiselvi Jayaraman
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BiCMOS low common mode and offset voltage amplifier

Proceedings of the 1996 BIPOLAR/BiCMOS Circuits and Technology Meeting, 2002
This paper discusses the design of a low common mode and offset voltage amplifier for current sensing in power IC applications. The current is sensed through a resistor connected between the source of a power device and ground. The sense amplifier operates with low input voltages, therefore requiring low input offset voltage to minimize the gain error.
A. Mayfield, R. Teggatz
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Optimized Common-Mode Voltage Reduction PWM for Three-Phase Voltage-Source Inverters

IEEE Transactions on Power Electronics, 2016
In this paper, two new optimized common-mode voltage reduction PWM (CMVRPWM) strategies based on solving the established constrained nonlinear programming models in the time domain are proposed and analyzed. The proposed current ripple losses-optimized CMVRPWM (CRLO-CMVRPWM) minimizes the mean-square values of the three-phase current ripples by ...
Xiang Wu   +4 more
openaire   +1 more source

Common mode voltage generation in 3-phase inverter

Актуальные проблемы морской энергетики. Материалы одиннадцатой международной научно-технической конференции, 2022
A.A. Vorshevsky, P.A. Vorshevsky
openaire   +1 more source

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