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Feature-PLPD-Aided Visual-Inertial Odometry for Low-Cost Embedded Systems. [PDF]
Sensors (Basel)Mamri A +3 more
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Efficient Computation of Mandelbrot Set Generation with Compute Unified Device Architecture (CUDA)
2022 6th International Conference on Informatics and Computational Sciences (ICICoS), 2022 Fajar Agung Nugroho
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Neurocomputing, 2017 This paper implements a real-time and directional counting algorithm using the Graphic Processing Unit (GPU) Programming for the purpose of detecting and counting people. We use the Compute Unified Device Architecture (CUDA) as the environment of the GPU
Selcuk Sevgen
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Compute Unified Device Architecture Application Suitability
Computing in Science and Engineering, 2009Graphics processing units (GPUs) can provide excellent speedups on some, but not all, general-purpose workloads. Using a set of computational GPU kernels as examples, the authors show how to adapt kernels to utilize the architectural features of a GeForce 8800 GPU and what finally limits the achievable performance.
Wen-mei Hwu, Shane Ryoo
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An Accelerated MJPEG 2000 Encoder Using Compute Unified Device Architecture
Communications in Computer and Information Science, 2010With the recent tremendous increase in Graphics Processing Unit’s computing capability, using it as a co-processor of the CPU has become fundamental for achieving high overall throughput. Nvidia’s Compute Device Unified Architecture (CUDA) can greatly benefit single instruction multiple thread styled, computationally expensive programs. Video encoding,
Rajdeep Niyogi
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Computing and Visualization in Science, 2008
In this article a very efficient implementation of a 2D-Lattice Boltzmann kernel using the Compute Unified Device Architecture (CUDA™) interface developed by nVIDIA® is presented. By exploiting the explicit parallelism exposed in the graphics hardware we obtain more than one order in performance gain compared to standard CPUs.
Jonas Tolke
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In this article a very efficient implementation of a 2D-Lattice Boltzmann kernel using the Compute Unified Device Architecture (CUDA™) interface developed by nVIDIA® is presented. By exploiting the explicit parallelism exposed in the graphics hardware we obtain more than one order in performance gain compared to standard CPUs.
Jonas Tolke
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Variable block size motion estimation implementation on compute unified device architecture (CUDA)
2013 IEEE International Conference on Consumer Electronics (ICCE), 2013This paper proposes a highly parallel variable block size full search motion estimation algorithm with concurrent parallel reduction (CPR) on graphics processing unit (GPU) using compute unified device architecture (CUDA). This approach minimizes memory access latency by using high-speed on-chip memory of GPU.
Dong-Kyu Lee
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H.264/AVC motion estimation implmentation on Compute Unified Device Architecture (CUDA)
2008 IEEE International Conference on Multimedia and Expo, 2008Due to the rapid growth of graphics processing unit (GPU) processing capability, using GPU as a coprocessor to assist the central processing unit (CPU) in computing massive data becomes essential. In this paper, we present an efficient block-level parallel algorithm for the variable block size motion estimation (ME) in H.264/AVC with fractional pixel ...
Hsueh-Ming Hang
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2009 International Conference on Signal Processing Systems, 2009
We explore the use of today’s high-end Graphics processing units on desktops to perform hierarchical agglomerative clustering with the Compute Unified Device Architecture – CUDA of NVIDIA. Although the advancement in graphics cards has made the gaming industry to flourish,there is a lot more to be gained the field of scientific computing, high ...
S.A. Arul Shalom +3 more
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We explore the use of today’s high-end Graphics processing units on desktops to perform hierarchical agglomerative clustering with the Compute Unified Device Architecture – CUDA of NVIDIA. Although the advancement in graphics cards has made the gaming industry to flourish,there is a lot more to be gained the field of scientific computing, high ...
S.A. Arul Shalom +3 more
exaly +2 more sources