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Frame-based parallelization of MPEG-4 on compute unified device architecture (CUDA)
2010 IEEE 2nd International Advance Computing Conference (IACC), 2010Due to its object based nature, flexible features and provision for user interaction, MPEG-4 encoder is highly suitable for parallelization. The most critical and time-consuming operation of encoder is motion estimation. Nvidia's general-purpose graphical processing unit (GPGPU) architecture allows for a massively parallel stream processor model at a ...
Dishant Ailawadi +2 more
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Accelerated Ray Tracing dengan Bounding Volume Hierarchy dan Compute Unified Device Architecture [PDF]
, 2017 Ray tracing is a technique in computer graphics that produced image by traversing ray from eye to every pixels on screen, and then the intersection checks between ray and objects are done.
Rina Savista Halim +2 more
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High-speed FDTD simulation algorithm for GPU with compute unified device architecture
2009 IEEE Antennas and Propagation Society International Symposium, 2009We proposed an FDTD algorithm for GPU with CUDA. Our GPU-FDTD algorithm performed high-speed FDTD simulation using GPU with CUDA, and maintained single-floating point accuracy. In the larger computational domain, the speedup factor becomes worse. The result suggests that the bottleneck of the FDTD simulation is memory bandwidth.
N. Takada +3 more
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Computers & Geosciences, 2013
In recent years, graphics processing units (GPUs) have emerged as a low-cost, low-power and a very high performance alternative to conventional central processing units (CPUs). The latest GPUs offer a speedup of two-to-three orders of magnitude over CPU for various science and engineering applications.
Jarno Mielikäinen +4 more
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In recent years, graphics processing units (GPUs) have emerged as a low-cost, low-power and a very high performance alternative to conventional central processing units (CPUs). The latest GPUs offer a speedup of two-to-three orders of magnitude over CPU for various science and engineering applications.
Jarno Mielikäinen +4 more
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Acceleration Method of 3D Medical Images Registration Based on Compute Unified Device Architecture
Bio-Medical Materials and Engineering, 2014Compute Unified Device Architecture (CUDA) is a parallel computing platform and programming model invented by NVIDIA. It enables dramatic increase in computing performance via the power of the graphics processing unit (GPU). In medical image analysis, 3D image registration generally takes relatively long time, which is not feasible for clinical ...
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2009 16th IEEE International Conference on Image Processing (ICIP), 2009
A correlation-based optical flow algorithm using Compute Unified Device Architecture (CUDA) technology to achieve fast motion-based image segmentation is described. Using CUDA, a 240 processor GPU implementation of an optimized correlation-based optical flow algorithm allows segmentation to be achieved at high frame rates on high-resolution video ...
Peter Kuchnio, David W. Capson
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A correlation-based optical flow algorithm using Compute Unified Device Architecture (CUDA) technology to achieve fast motion-based image segmentation is described. Using CUDA, a 240 processor GPU implementation of an optimized correlation-based optical flow algorithm allows segmentation to be achieved at high frame rates on high-resolution video ...
Peter Kuchnio, David W. Capson
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The Journal of Supercomputing, 2011
Recent development in Graphics Processing Units (GPUs) has enabled inexpensive high performance computing for general-purpose applications. Compute Unified Device Architecture (CUDA) programming model provides the programmers adequate C language like APIs to better exploit the parallel power of the GPU.
Liheng Jian +5 more
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Recent development in Graphics Processing Units (GPUs) has enabled inexpensive high performance computing for general-purpose applications. Compute Unified Device Architecture (CUDA) programming model provides the programmers adequate C language like APIs to better exploit the parallel power of the GPU.
Liheng Jian +5 more
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SOLUTIONS FOR OPTIMIZING THE STREAM COMPACTION ALGORITHMIC FUNCTION USING THE COMPUTE UNIFIED DEVICE ARCHITECTURE [PDF]
Journal of Information Systems and Operations Management, 2012 In this paper, I have researched and developed solutions for optimizing the stream compaction algorithmic function using the Compute Unified Device Architecture (CUDA). The stream compaction is a common parallel primitive, an essential building block for many data processing algorithms, whose optimization improves the performance of a wide class of ...
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Simplified novel look-up table method using compute unified device architecture
3D Research, 2011In this study, we have exploited the parallel nature of the computations involved in the process of digital holography using novel look-up table method. We utilize CUDA enabled GPU to accelerate each step of the digital holography, i.e. preparation of the principle fringe patterns, hologram synthesis by accessing and superimposing the appropriate ...
Zulfiqar Ali +4 more
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A defect inspection method for TFT panel using the compute unified device architecture (CUDA)
2009 IEEE International Symposium on Industrial Electronics, 2009In this paper, a parallel algorithm to inspect defects of thin film transistor liquid crystal displays (TFT-LCD) panel is presented. The algorithm is implemented on a graphics processing unit (GPU) using the compute unified device architecture (CUDA) development environment. The result shows better performance compared to the one implemented on a CPU.
Changki Jeong +2 more
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