Results 1 to 10 of about 358,183 (197)
Software systems for operation, control, and monitoring of the EBEX instrument [PDF]
, 2010 We present the hardware and software systems implementing autonomous operation, distributed real-time monitoring, and control for the EBEX instrument. EBEX is a NASA-funded balloon-borne microwave polarimeter designed for a 14 day Antarctic flight that ...
Ade, Peter A. R. +38 more
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High-Throughput FPGA Implementation of QR Decomposition [PDF]
, 2015 Munoz, S.D.; Hormigo, J. "High-Throughput FPGA Implementation of QR Decomposition" IEEE Transactions on in Circuits and Systems II: Express Briefs,vol.62, no.9, pp.861-865, Sept.
Hormigo-Aguilar, Javier +1 more
core +1 more source
A general guide to applying machine learning to computer architecture [PDF]
, 2018 The resurgence of machine learning since the late 1990s has been enabled by significant advances in computing performance and the growth of big data.
Arkose, Tugberk +6 more
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Immunotronics - novel finite-state-machine architectures with built-in self-test using self-nonself differentiation [PDF]
, 2002 A novel approach to hardware fault tolerance is demonstrated that takes inspiration from the human immune system as a method of fault detection. The human immune system is a remarkable system of interacting cells and organs that protect the body from ...
Bradley, D.W., Tyrrell, A.M.
core +2 more sources
A versatile Montgomery multiplier architecture with characteristic three support [PDF]
, 2008 We present a novel unified core design which is extended to realize Montgomery multiplication in the fields GF(2n), GF(3m), and GF(p). Our unified design supports RSA and elliptic curve schemes, as well as the identity-based encryption which requires a ...
Ozturk, Erdinc +4 more
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The AXIOM software layers [PDF]
, 2016 AXIOM project aims at developing a heterogeneous computing board (SMP-FPGA).The Software Layers developed at the AXIOM project are explained.OmpSs provides an easy way to execute heterogeneous codes in multiple cores.
Ayguadé Parra, Eduard +24 more
core +3 more sources
Vector processing-aware advanced clock-gating techniques for low-power fused multiply-add [PDF]
, 2018 The need for power efficiency is driving a rethink of design decisions in processor architectures. While vector processors succeeded in the high-performance market in the past, they need a retailoring for the mobile market that they are entering now ...
Cristal Kestelman, Adrián +5 more
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Analytical Cost Metrics : Days of Future Past
, 2018 As we move towards the exascale era, the new architectures must be capable of running the massive computational problems efficiently. Scientists and researchers are continuously investing in tuning the performance of extreme-scale computational problems.
Djidjev, Hristo +2 more
core +1 more source
Enlarging instruction streams [PDF]
, 2007 The stream fetch engine is a high-performance fetch architecture based on the concept of an instruction stream. We call a sequence of instructions from the target of a taken branch to the next taken branch, potentially containing multiple basic blocks, a
Ramírez Bellido, Alejandro +2 more
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Lessons learned from the design of a mobile multimedia system in the Moby Dick project [PDF]
, 2000 Recent advances in wireless networking technology and the exponential development of semiconductor technology have engendered a new paradigm of computing, called personal mobile computing or ubiquitous computing. This offers a vision of the future with a
Havinga, Paul J.M., Smit, Gerard J.M.
core +2 more sources