Results 151 to 160 of about 11,679 (206)

Organization of mouse prefrontal cortex subnetwork revealed by spatial single-cell multi-omic analysis of SPIDER-Seq. [PDF]

open access: yesNatl Sci Rev
Sun L   +17 more
europepmc   +1 more source

FETCH enables fluorescent labeling of membrane proteins in vivo with spatiotemporal control in <i>Drosophila</i>. [PDF]

open access: yesProc Natl Acad Sci U S A
Rostam KD   +7 more
europepmc   +1 more source

The mechanism of action of clozapine. [PDF]

open access: yesJ Psychopharmacol
Morrison PD, Jauhar S, Young AH.
europepmc   +1 more source

Curve448 on 32-Bit ARM Cortex-M4

2021
Public key cryptography is widely used in key exchange and digital signature protocols. Public key cryptography requires expensive primitive operations, such as finite-field and group operations. These finite-field and group operations require a number of clock cycles to execute.
Hwajeong Seo, Reza Azarderakhsh
openaire   +1 more source

Compressed SIKE Round 3 on ARM Cortex-M4

2021
In 2016, the National Institute of Standards and Technology (NIST) initiated a standardization process among the post-quantum secure algorithms. Forming part of the alternate group of candidates after Round 2 of the process is the Supersingular Isogeny Key Encapsulation (SIKE) mechanism which attracts with the smallest key sizes offering post-quantum ...
Mila Anastasova   +3 more
openaire   +1 more source

Low Cost Fall Detection Based on Cortex M4

2019 42nd International Conference on Telecommunications and Signal Processing (TSP), 2019
This paper presents a first indoor prototype of a fall detection device based on a Cortex M4 microcontroller. The main features of this device are its low cost, the communication capabilities that permit to send alarms and that it does not require the users to bring any device in their body.
Eduard Minguez, Marcos Faundez-Zanuy
openaire   +1 more source

All the HIGHT You Need on Cortex–M4

2020
In this paper, we present high-speed and secure implementations of HIGHT block cipher on 32-bit ARM Cortex-M4 microcontrollers. We utilized both data parallelism and task parallelism to reduce the execution timing. In particular, we used the 32-bit wise ARM–SIMD instruction sets to perform the parallel computations in efficient way.
Hwajeong Seo, Zhe Liu
openaire   +1 more source

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