Results 51 to 60 of about 62,963 (220)
Feature Disentangling and Combination Implemented by Spin–Orbit Torque Magnetic Tunnel Junctions
Spin–orbit torque magnetic tunnel junctions (SOT‐MTJs) enable efficient feature disentangling and integration in image data. A proposed algorithm leverages SOT‐MTJs as true random number generators to disentangle and recombine features in real time, with experimental validation on emoji and facial datasets.
Xiaohan Li +15 more
wiley +1 more source
Fast Bitmap Fit: A CPU Cache Line friendly memory allocator for single\n object allocations [PDF]
Dhruv Mátáni, Gaurav Menghani
openalex +2 more sources
An ultra low-power hardware accelerator for automatic speech recognition [PDF]
Automatic Speech Recognition (ASR) is becoming increasingly ubiquitous, especially in the mobile segment. Fast and accurate ASR comes at a high energy cost which is not affordable for the tiny power budget of mobile devices.
Arnau Montañés, José María +3 more
core +1 more source
A lightweight machine learning (ML)‐based thermal prediction framework is demonstrated and implemented on a field‐programmable gate array (FPGA). Using measured temperature data from a real chiplet, the approach enables real‐time, die‐level heat‐map inference with low power consumption, validating practical on‐chip thermal monitoring for advanced ...
Jun Ho Lee +4 more
wiley +1 more source
ControlIt: A Universal Framework for Translational, Adaptive, and Online Brain–Computer Interfaces
Brain–computer interfaces (BCIs) lack a unified platform that works across signals and algorithms. ControlIt, an open‐source, modular ROS2‐based BCI framework supporting electroencephalography (EEG), electrocorticography (ECoG), and spike‐based decoding across both classification and regression tasks is presented.
Wanlin Yang +12 more
wiley +1 more source
Implementation of RSA Signatures on GPU and CPU Architectures
This paper reports a constant-time CPU and GPU software implementation of the RSA exponentiation by using algorithms that offer a first-line defense against timing and cache attacks.
Eduardo Ochoa-Jimenez +3 more
doaj +1 more source
Accelerating CPU-Based Sparse General Matrix Multiplication With Binary Row Merging
Sparse general matrix multiplication (SpGEMM) is a fundamental building block for many real-world applications. Since SpGEMM is a well-known memory-bounded application with vast and irregular memory accesses, considering the memory access efficiency is ...
Zhaoyang Du +5 more
doaj +1 more source
A Survey of Methods For Analyzing and Improving GPU Energy Efficiency
Recent years have witnessed a phenomenal growth in the computational capabilities and applications of GPUs. However, this trend has also led to dramatic increase in their power consumption.
Mittal, Sparsh, Vetter, Jeffrey S.
core +1 more source
The immersed boundary method (IBM) was coupled with the moment representation lattice Boltzmann method (MR‐LBM), reducing bandwidth requirements compared to population‐based LBM formulations. A systematic assessment of IBM parameters was conducted to quantify their effect on computational performance.
Marco A. Ferrari +2 more
wiley +1 more source
Design and Implementation of Multi-channel Data Acquisition Controller Based on FPGA [PDF]
In order to improve the real-time performance of Data Acquisition Controller(DAC) based on general PC,a multi-channel real-time data acquisition controller is designed.By using the Field Programmable Gate Array(FPGA) hardware technology,the data ...
ZHAO Tao,GUO Meng,GU Yaliu,ZHANG Yang
doaj +1 more source

