Results 11 to 20 of about 357,348 (201)
Switched-Current Chaotic Neurons [PDF]
, 1994 The Letter presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks. They have been fabricated in a double-metal, single-poly 1.6µm CMOS technology.
Delgado Restituto, Manuel +1 more
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On the design and characterization of femtoampere current-mode circuits [PDF]
, 2003 In this paper, we show and validate a reliable circuit design technique based on source voltage shifting for current-mode signal processing down to femtoamperes.
Linares Barranco, Bernabé +1 more
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Novel Current‐Mode Quotient Circuit [PDF]
Active and Passive Electronic Components, 1994 A novel current‐mode quotient circuit is presented. The circuit uses available devices. Effects of non‐ideal active‐elements are considered.
openaire +2 more sources
MOS Current Mode Logic Near Threshold Circuits
Journal of Low Power Electronics and Applications, 2014 Near threshold circuits (NTC) are an attractive and promising technology that provides significant power savings with some delay penalty. The combination of NTC technology with MOS current mode logic (MCML) is examined in this work.
Alexander Shapiro, Eby G. Friedman
doaj +1 more source
CMOS current-mode chaotic neurons [PDF]
, 1994 This paper presents two nonlinear CMOS current-mode circuits that implement neuron soma equations for chaotic neural networks, and another circuit to realize programmable current-mode synapse using CMOS-compatible BJT's.
Delgado Restituto, Manuel +1 more
core +1 more source
Hybrid Dynamic CML with Modified Current Source (H-MDyCML): A Low-Power Dynamic MCML Style
Advances in Electrical and Electronic Engineering, 2021 With the growing demands of portable devices, it is necessary to pay attention to low-power digital integrated designs. This paper proposes a low-power MOS Current Mode Logic (MCML) design, termed as Hybrid Dynamic Current Mode Logic with modified ...
Riya Jain, Kirti Gupta, Neeta Pandey
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On signalling over through-silicon via (TSV) interconnects in 3-D integrated circuits. [PDF]
, 2010 This paper discusses signal integrity (SI) issues and signalling techniques for Through Silicon Via (TSV) interconnects in 3-D Integrated Circuits (ICs). Field-solver extracted parasitics of TSVs have been employed in Spice simulations to investigate the
Grange, M. +3 more
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gm/Id$g_m/I_d$ Analysis of vertical nanowire III–V TFETs
Electronics Letters, 2023 Experimental data on analog performance of gate‐all‐around III‐V vertical Tunnel Field‐Effect Transistors (TFETs) and circuits are presented. The individual device shows a minimal subthreshold swing of 44 mV/dec and transconductance efficiency of 50 V−1 ...
Gautham Rangasamy +3 more
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Advances in Electrical and Electronic Engineering, 2021 The use of voltage differencing current conveyor as an active device to design a current-mode oscillator along with a universal filter with only grounded passive elements is the main focus of this manuscript.
Tajinder Singh Arora +2 more
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A wideband linear tunable CDTA and its application in field programmable analogue array [PDF]
, 2016 This document is the Accepted Manuscript version of the following article: Hu, Z., Wang, C., Sun, J. et al. ‘A wideband linear tunable CDTA and its application in field programmable analogue array’, Analog Integrated Circuits and Signal Processing, Vol ...
A Laknaur +34 more
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