Results 11 to 20 of about 9,574,598 (297)
On signalling over through-silicon via (TSV) interconnects in 3-D integrated circuits. [PDF]
, 2010 This paper discusses signal integrity (SI) issues and signalling techniques for Through Silicon Via (TSV) interconnects in 3-D Integrated Circuits (ICs). Field-solver extracted parasitics of TSVs have been employed in Spice simulations to investigate the
Grange, M. +3 more
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Understanding key concepts of electric circuits: Students' use of mental models [PDF]
, 2012 This study presents an action research project on the teaching and learning of fundamental ideas about electric circuits, gathering data from two cohorts.
Borg Marks, Joan
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Bandwidth aspects in second generation current conveyors [PDF]
, 2002 This paper discusses bandwidth problems associated with second-generation current conveyors (CCII). In particular, our work is centered in high-capacitance applications, and has been oriented for wireless optical links and applied physics.
Alves, L. N., Aguiar, R.L., Santos, D.M.
core +1 more source
Performance of common-mode chokes [PDF]
, 2010 A low-cost method for experimental investigation of common-mode chokes for reducing high-frequency motor ground-currents of inverter-based drive systems of several hundred kW is presented.
Heng, Bee See, Muetze, Annette
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A CMOS Current-Mode Dynamic Programming Circuit [PDF]
IEEE Transactions on Circuits and Systems I: Regular Papers, 2010 Dynamic programming (DP) is a fundamental algorithm for complex optimization and decision-making in many engineering and biomedical systems. However, conventional DP computation based on digital implementation of the Bellman-Ford recursive algorithm suffers from the “curse of dimensionality” and substantial iteration delays which hinder utility in real-
Mak T, Lam K, Ng H, Rachmuth G, Poon C
openaire +4 more sources
A flexible current‐mode classifier circuit and its applications [PDF]
International Journal of Circuit Theory and Applications, 2011 AbstractIn this paper a new CMOS classifier circuit is presented, simulated, and compared with other recently introduced circuits. The proposed CMOS circuit operates in current‐mode and can classify several types of data. The architecture is designed using two threshold circuits and a subtraction circuit.
Merih Yildiz +2 more
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A current-mode interface circuit for a piezoresistive pressure sensor [PDF]
, 1998 An interfacing circuit for piezoresistive pressure sensors based on CMOS current conveyors is presented. The main advantages of the proposed interfacing circuit include the use of a single piezoresistor, the capability of offset compensation, and a ...
Rubio, Carles +5 more
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Design of current sources for load common mode optimization
Journal of Electrical Bioimpedance, 2018 Bioimpedance measurement systems often use the Howland current sources to excite the biological material under study. Usually, difference or instrumentation amplifiers are used to measure the resulting voltage drop on this material.
Sirtoli Vinicius G +2 more
doaj +1 more source
gm/Id$g_m/I_d$ Analysis of vertical nanowire III–V TFETs
Electronics Letters, 2023 Experimental data on analog performance of gate‐all‐around III‐V vertical Tunnel Field‐Effect Transistors (TFETs) and circuits are presented. The individual device shows a minimal subthreshold swing of 44 mV/dec and transconductance efficiency of 50 V−1 ...
Gautham Rangasamy +3 more
doaj +1 more source
The Design of Current Mode CMOS Multiple-Valued Circuits [PDF]
[1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic, 1991 A vertical partitioning algorithm for the design of multiple-valued current-mode CMOS logic (CMCL) circuits that is based on the cost-table technique is proposed. The algorithm is a heuristic search technique (AO* algorithm) applied to an AND-OR tree. It partitions a given function according to the location of logic zeros.
Chang, Young-hoon, Butler, Jon T.
openaire +3 more sources