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On the cyclic redundancy-check codes with 8-bit redundancy

Computer Communications, 1998
Polynomials of degree eight over GF(2) which are suitable to be used as generator polynomials for cyclic redundancy-check (CRC) codes are investigated. Their minimum distance, properness and undetected error probability for binary symmetric channels (BSCs) are compared with the existing ATM standard.
Tsonka Baicheva
exaly   +2 more sources

Finding cyclic redundancy check polynomials for multilevel systems

IEEE Transactions on Communications, 1998
Summary: This letter describes a technique for finding cyclic redundancy check polynomials for systems for transmission over symmetric channels that encode information in multiple voltage levels so that the resulting redundancy check gives good error protection and is efficient to implement. The codes that we construct have a Hamming distance of 3 or 4.
James A. Davis   +2 more
exaly   +3 more sources

Low-Complexity Parallel Cyclic Redundancy Check

2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021
Cyclic redundancy check (CRC) is adopted in many digital communication and storage systems to ensure data integrity. CRC en/decoding is carried out using linear feedback shift registers (LFSRs) and a parallel LFSR can be implemented by registers with a feedback matrix multiplication and an input pre-processing matrix multiplication. A large parallelism
Xinmiao Zhang 0001, Yok Jye Tang
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Cyclic redundancy checking by program

Proceedings of the May 16-18, 1972, spring joint computer conference on - AFIPS '72 (Spring), 1971
Recent advances in the use of mini-computers as control elements of a computer complex and as intelligent terminals are indicative of a trend toward relocation of certain hardware functions to micro-program or machine level program. One such function which is a particularly good candidate, for various reasons, has already been moved into program in ...
Paul E. Boudreau, Robert F. Steen
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Cyclic redundancy checks in Ada95

ACM SIGAda Ada Letters, 1997
Among the many error detection techniques used in (tele)communications, the Cyclic Redundancy Check (CRC) is probably the most powerful one. Roughly speaking the CRC is merely a modulo-2 division of the data (bits) to be transmitted by some 'magical' polynomial known for its high error detection capabilities.
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Cyclic redundancy checking

1997
While parity checks are useful for low data rates and asynchronous messages where large gaps in between successive bytes make compilation of data into block impossible, for more general protection of data a much more robust error detection scheme is necessary.
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Pipelined Cyclic Redundancy Check (CRC) Calculation

2007 16th International Conference on Computer Communications and Networks, 2007
Traditional methods to calculate CRC suffer from diminishing returns. Doubling the data width doesn't double the maximum data throughput, the worst case timing path becomes slower. Feedback in the traditional implementation makes pipelining problematic. However, the on chip data width used for high throughput protocols is constantly increasing.
openaire   +1 more source

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