Results 11 to 20 of about 737 (169)
CRC-aided Multiple Traceback Decoding Algorithm of Spinal Code [PDF]
In order to improve the decoding efficiency of Spinal code,the beam search and Cyclic Redundancy Check(CRC)decoding are considered as a whole for joint decoding,a CRC-aided multiple traceback decoding algorithm is proposed.The correct decoding route is ...
QU Xiaoxu,YANG Liming,MIAO Quanqiang
doaj +1 more source
Design of concatenated Hash-Polar code based on segmented CRC code
As a linear block code, the polarization code has a lower coding complexity and a definite structure, but when it has a short or medium code length, the performance will be reduced.A design method of concatenated HashPolar codes based on segmented cyclic
Zhengjie LI, Shunlan LIU, Xu ZHANG
doaj +2 more sources
Cyclic Redundancy Checking (CRC) Accelerator for Embedded Processor Datapaths [PDF]
We present the integration of a multimode Cyclic Redundancy Checking (CRC) accelerator unit with an embedded processor datapath to enhance the processor performance in terms of execution time and energy efficiency. We investigate the performance of CRC accelerated embedded processor datapath in terms of execution time and energy efficiency.
Abdul Rehman +4 more
openaire +1 more source
Exploring Various Levels of Parallelism in High-Performance CRC Algorithms
Modern processors have increased the capabilities of instruction-level parallelism (ILP) and thread-level parallelism (TLP). These resources, however, typically exhibit poor utilization on conventional cyclic redundancy check (CRC) algorithms.
Mucong Chi, Dazhong He, Jun Liu
doaj +1 more source
Design of fieldbus chip based on IEC 1158 standard
This paper introduces a kind of physical layer fieldbus chip architecture and its implementation in accordance with IEC 1158 standard. The chip is designed with Manchester codec circuit, Cyclic Redundancy Check(CRC) verification circuit, carrier ...
Zhang Liguo +5 more
doaj +1 more source
Design and implementation of parallel CRC algorithm for fibre channel on FPGA
Fibre channel (FC) provides the high-speed and low-latency communication between the end systems, widely used in data storage, aerospace applications and large electronic equipment including radar systems.
Wu Chuxiong, Shi Haifeng
doaj +1 more source
Error-Aware SCFlip Decoding of Polar Codes
The successive-cancellation flip (SCFlip) decoder and its variants provide a significant coding gain with the average complexity practically identical to that of the successive cancellation (SC) decoder in a wide range of signal-to-noise ratios (SNRs ...
Daeyeol Yang, Kyeongcheol Yang
doaj +1 more source
A New List Decoding Algorithm for Short-Length TBCCs With CRC
In this paper, a new list decoding algorithm for tail-biting convolutional codes (TBCCs) with a cyclic redundancy check (CRC) is proposed, where the CRC is considered as a concatenated outer code.
Jae-Won Kim +3 more
doaj +1 more source
A novel method for encoding and decoding based on enhanced parity-check-concatenated polar codes
Polar codes have perfect coding and decoding performance as a kind of error correction code, which have become a standard coding scheme for 5G short code control channel. While the length of polar codes is short, its performance is not good enough.
Yan WANG +3 more
doaj +2 more sources
Polar Codes With Repeating Bits and the Construction by Cluster Pairwise Error Probability
A polar code with repeating bits (RB polar code), where a part of frozen bits only repeat their preceding information bits, is proposed. In the code construction, we propose cluster pairwise error probability (CPEP) to measure the competitiveness of the ...
Tao Wang, Daiming Qu, Tao Jiang
doaj +1 more source

