Results 131 to 139 of about 474 (139)

Digital-to-Frequency Converters With a DTC: Theoretical Analysis of the Output SFDR [PDF]

open access: yesIEEE Transactions on Circuits and Systems I: Regular Papers, 2019
In this paper, we propose and analyze a pulse-output digital-to-frequency converter (DFC) generating square waves, which uses a digital-to-time converter (DTC) to correct the spurious tones (spurs) in the output spectrum.
Claudia Palattella   +2 more
exaly   +2 more sources

An Adaptive Pre-Distortion Technique to Mitigate the DTC Nonlinearity in Digital PLLs [PDF]

open access: yesIEEE Journal of Solid-State Circuits, 2014
Digital fractional-N phase-locked loops (PLLs) are an attractive alternative to analog PLLs in the design of frequency synthesizers for wireless applications.
Salvatore Levantino   +2 more
exaly   +2 more sources
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Digital-to-time converter for test equipment implemented using FPGA DSP blocks

Measurement: Journal of the International Measurement Confederation, 2021
P Kwiatkowski
exaly  

A Fractional-N Digital MDLL With Background Two-Point DTC Calibration

IEEE Journal of Solid-State Circuits, 2022
Qiaochu Zhang, Shiyu Su, Cheng-Ru Ho
exaly  

A 10-bit 563-fs Step Constant-Slope Digital-to-Time Converter in 40-nm CMOS With Nonlinearity Cancellation and Range Extension Techniques

IEEE Transactions on Circuits and Systems I: Regular Papers, 2023
Yan Liu, Haoyuan Gao, Hao Xu
exaly  

A 2 GHz 244 fs-Resolution 1.2 ps-Peak-INL Edge Interpolator-Based Digital-to-Time Converter in 28 nm CMOS

IEEE Journal of Solid-State Circuits, 2016
Ofir Degani, Rotem Banin, Ashoke Ravi
exaly  

A Cellular Multiband DTC-Based Digital Polar Transmitter With −153-dBc/Hz Noise in 14-nm FinFET

IEEE Journal of Solid-State Circuits, 2020
Paolo Madoglio   +2 more
exaly  

A Cellular Multiband DTC-Based Digital Polar Transmitter With −153 dBc/Hz Noise in 14-nm FinFET

IEEE Solid-State Circuits Letters, 2019
Yorgos Palaskas   +2 more
exaly  

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