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An ULP Capacitor-DAC-Based Constant-Slope Digital-to-Time Converter
International Congress of Mathematicans, 2020This paper presents a constant-slope digital-to-time converter (CS-DTC) that leverages the concepts of constant-slope charging and charge redistribution to achieve high linearity with ultra-low power consumption (ULP) that makes the proposed DTC suitable
Kareem R. Rashed +4 more
semanticscholar +1 more source
A High-Linearity 250-MHz Constant-Slope Digital-to-Time Converter
International Conference on Electronics, Circuits, and SystemsThis paper presents a high-linearity constant-slope digital-to-time converter (DTC) targeting high-precision timing applications in fractional-N synthesizers and fractional output dividers.
Peng Chen +6 more
semanticscholar +1 more source
IEEE Transactions on Circuits and Systems Part 1: Regular Papers
This paper presents a power-efficient constant-slope digital-to-time converter (DTC) with embedded nonlinearity cancellation. By utilizing the capacitor based digital-to-analog converter (C-DAC) to adjust the initial voltage of the discharging process ...
Yan Liu +4 more
semanticscholar +1 more source
This paper presents a power-efficient constant-slope digital-to-time converter (DTC) with embedded nonlinearity cancellation. By utilizing the capacitor based digital-to-analog converter (C-DAC) to adjust the initial voltage of the discharging process ...
Yan Liu +4 more
semanticscholar +1 more source
Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology
PrimeThis work proposes and analyzes a split-constant-slope digital-to-time converter topology (SCS DTC). The proposed circuit is extremely robust to the non-linearities of current generators and non-linear capacitors, as well as to process spreads. As a case
NicolÒ Zugno, Andrea Bevilacqua
semanticscholar +1 more source
IEEE Transactions on Circuits and Systems - II - Express Briefs, 2019
This brief presents a digital-to-time converter (DTC) based on a reconfigurable delay-locked loop that employs dual feedback taps and interpolation at the output of two charge pumps biased with programmable complementary currents from a current digital ...
Ahmed Elian, I. Elfadel, A. Shabra
semanticscholar +1 more source
This brief presents a digital-to-time converter (DTC) based on a reconfigurable delay-locked loop that employs dual feedback taps and interpolation at the output of two charge pumps biased with programmable complementary currents from a current digital ...
Ahmed Elian, I. Elfadel, A. Shabra
semanticscholar +1 more source
Analog Integrated Circuits and Signal Processing, 2022
I. Jung, S. Bae, Sin-Pyo Lee, Minjae Lee
semanticscholar +1 more source
I. Jung, S. Bae, Sin-Pyo Lee, Minjae Lee
semanticscholar +1 more source
Photothermal Nanomaterials: A Powerful Light-to-Heat Converter
Chemical Reviews, 2023Ximin Cui, Qifeng Ruan, Xiaolu Zhuo
exaly
Continuous wideband microwave-to-optical converter based on room-temperature Rydberg atoms
Nature Photonics, 2023, Mateusz Mazelanik, Michał Parniak
exaly
Graphene-Based Standalone Solar Energy Converter for Water Desalination and Purification
ACS Nano, 2018Pulickel M Ajayan +2 more
exaly

