Results 1 to 10 of about 13,076 (161)
Fully-integrated LDO voltage regulator for digital circuits [PDF]
Low-dropout (LDO) voltage regulators are widely used to supply low-voltage digital circuits. For recent ultra-low-power microcontroller systems, a fully-integrated LDO without any external capacitance is preferred in order to achieve a fast and energy ...
M. Lüders +3 more
doaj +2 more sources
An Analog-Assisted Digital LDO With Dynamic-Biasing Asynchronous Comparator
This paper presents a digital low-dropout regulator (DLDO) with three-level switching (TLS) and analog-assisted (AA) structure formed by dynamic-biasing asynchronous comparator, capacitive-coupling RC network and auxiliary power switch.
Yuet Ho Woo +5 more
doaj +2 more sources
A Fast Transient Response Capacitor-Less LDO with Transient Enhancement Technology [PDF]
This paper proposes a fast transient load response capacitor-less low-dropout regulator (CL-LDO) for digital analog hybrid circuits in the 180 nm process, capable of converting input voltages from 1.2 V to 1.8 V into an output voltage of 1 V.
Chufan Chen +4 more
doaj +2 more sources
A Nano-Power 0.5 V Event-Driven Digital-LDO with Fast Start-Up Burst Oscillator for SoC-IoT
Towards the integration of Digital-LDO regulators in the ultra-low-power System-On-Chip Internet-of-Things architecture, the D-LDO architecture should constitute the main regulator for powering digital and mixed-signal loads including the SoC system ...
Christos Konstantopoulos +1 more
doaj +2 more sources
The Design of An LDO Regulator [PDF]
In today’s modern systems on chip (SOCs), a crucial power management circuit is the low-dropout (LDO) regulator. Of course, the need for supply voltage regulation, goes back many years in the past since the circuits have been designed.
Nawaz Gareeb, Charan Chhagan
doaj +1 more source
Asynchronous Digital Low-Dropout Regulator With Dual Adjustment Mode in Ultra-Low Voltage Input
This paper presents the asynchronous digital low-dropout regulator (AD-LDO) with dual adjustment mode in ultra-low voltage input. The architecture of the proposed AD-LDO consists of the asynchronous control loop and the power PMOS array.
Wei-Bin Yang +3 more
doaj +1 more source
Design of High Performance Hybrid Type Digital-Feedback Low Drop-Out Regulator Using SSCG Technique
This paper proposes a high-performance Digital Feedback low-dropout voltage regulator (DF-LDO) for low power applications. In the DF-LDO regulator, digital feedback and applying spectrum spread clock generator (SSCG) technique are used to reduce output ...
Muhammad Asif +6 more
doaj +1 more source
Low-dropout (LDO) voltage regulator has fascinated industry professionals and academia for the past few decades, and this trend is expected to continue in the coming years.
Li Fang Lai +7 more
doaj +1 more source
Digital LDO regulator with analogue‐assisted loop using source follower [PDF]
A digital low‐dropout regulator (DLDO) with an analogue‐assist (AA) loop using a source follower has been proposed to improve the drawbacks of the DLDO. The proposed AA loop, which uses a source follower structure to generate the compensation current without additional passive components, mitigates the voltage droop and accelerates
E. Kim, C. Kim
openaire +1 more source
A Brief Tutorial on Mixed Signal Approaches to Combat Electronic Counterfeiting
As integrated circuit (IC) designs become more and more complex, the globalization of the IC supply chain has become inevitable. Because multiple entities are required to design, fabricate, test, and distribute an IC, the need for reliable security and ...
Troy Bryant +4 more
doaj +1 more source

