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Digital-LDO Switched Capacitors based for 0.5V applications
2020 32nd International Conference on Microelectronics (ICM), 2020This work presents the design of a 0.5V digital low dropout voltage regulator (DLDO) in 180nm CMOS technology for Dynamic Voltage Scaling applications. Dynamic and leakage power consumption in VLSI systems are effectively reduced by ultra-low voltage operation, being that the maximum energy efficiency is achieved at supply voltage below 0.5V.
Thiago Alves Mendes do Amaral +2 more
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An NMOS Digital LDO With NAND-Based Analog-Assisted Loop in 28-nm CMOS
IEEE Transactions on Circuits and Systems I: Regular Papers, 2020 This paper presents an NMOS digital low-dropout regulator (LDO) with fast transient response and ultra-low quiescent current, to provide a tunable power supply for near-threshold voltage computing circuits in internet-of-things (IoT) devices. An LDO with
Yan Lu, Qiang Li, Xiaofei Ma
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Time-based Digital LDO Regulator
2019 31st International Conference on Microelectronics (ICM), 2019This paper presents a digital LDO (DLDO) regulator utilizing a time-based comparator rather than a voltage-based comparator in order to exploit the advantages of time domain and produce a more robust regulator. The time-based comparator compares between the reference and the load voltage levels and generates a digital bit that turns on/off the PMOS ...
Leen Qasem +3 more
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IEEE Solid-State Circuits Letters, 2019 A digital low-dropout (LDO) voltage regulator using a single-VCO-based edge-racing time quantizer (SVER TQ) was designed to achieve a fast-transient response and a high-accuracy of the output voltage.
Jooeun Bang +2 more
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Embedded hybrid LDO topologies for digital load circuits
2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2016Digital low dropout voltage regulators provide digital process synthesiz ability, fast transient response and performance adaptation but lack steady state voltage regulation performance. To overcome this lack of steady state accuracy due to limit cycle oscillations, a hybrid low dropout voltage regulator topology designed in 130 nm CMOS process is ...
Saad Bin Nasir, Arijit Raychowdhury
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Digital LDO modeling for early design space exploration
2016 29th IEEE International System-on-Chip Conference (SOCC), 2016Digital low dropout (LDO) voltage regulators have been widely used in the latest low-power circuits that involve fine-grain power management. Due to the mixture of discrete- and continuous-time operation as well as the nonlinear comparator gain, it is difficult to derive the closed-loop transfer function for a digital LDO.
Stefan Leitner +3 more
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An Analog-Proportional Digital-Integral Multiloop Digital LDO With PSR Improvement and LCO Reduction
IEEE Journal of Solid-State Circuits, 2020This article presents a low-dropout regulator (LDO), with analog-proportional (AP) and digital integral (DI) controls. The design concerns are discussed at first, on how to improve the load transient response, enhance the power supply rejection (PSR), and reduce the limit cycle oscillation (LCO).
Mo Huang, Yan Lu 0002, Rui Paulo Martins
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Mitigation of NBTI induced performance degradation in on-chip digital LDOs
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018On-chip digital low-dropout voltage regulators (LDOs) have recently gained impetus and drawn significant attention for integration within both mobile devices and micro-processors. Although the benefits of easy integration and fast response speed surpass analog LDOs and other voltage regulator types, NBTI induced performance degradation is typically ...
Longfei Wang +3 more
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A Three-Stage Coarse-Fine-Tuning Analog-Assisted Digital LDO
Journal of Circuits, Systems and Computers, 2020This paper proposes a three-stage coarse-fine-tuning analog-assisted digital low dropout regulator (AAD-LDO) without digital ripple. The digital regulation consists of two stages, which break the accuracy-speed-power trade-off. To further improve transient response, a step-variable counter used in the first stage is designed, which makes sure that the
Lianxi Liu +4 more
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Ratioed Logic Comparator-Based Digital LDO Regulator
2020The proposed wearable biomedical device as given in Fig. 1.12 includes analog and noise sensitive blocks that should be supplied by LDO regulator in order to support a clean and a low voltage ripple. LDO regulators are widely utilized in PMU as they provide fast response, small area, and full integration. However, with the increase of process variation
Dima Kilani +4 more
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