Results 151 to 160 of about 13,095 (178)
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Ratioed Logic Comparator Based Digital LDO Regulator in 22nm FDSOI
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020This paper presents a fast and an efficient digital LDO (DLDO) regulator utilizing a clock-less ratioed logic comparator (RLC). In addition to eliminating the clock, the proposed RLC-DLDO removes the shift registers used in the conventional DLDO. It achieves a transient speed improvement in the ns range and a quiescent current reduction by 9X over the ...
Dima Kilani +2 more
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IEEE Journal of Solid-State Circuits, 2020
This article presents an event-driven charge-pump-based low-dropout (LDO) regulator with an ac-coupled high-impedance (ACHZ) feedback loop. By using the ACHZ loop and continuous-time dead-zone detection, the proposed LDO responds in less than a clock cycle during load transients, achieving the response and settling times of 6.9 and 65 ns, respectively,
Xiaoyang Wang, Patrick P. Mercier
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This article presents an event-driven charge-pump-based low-dropout (LDO) regulator with an ac-coupled high-impedance (ACHZ) feedback loop. By using the ACHZ loop and continuous-time dead-zone detection, the proposed LDO responds in less than a clock cycle during load transients, achieving the response and settling times of 6.9 and 65 ns, respectively,
Xiaoyang Wang, Patrick P. Mercier
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A 225-mA Binary Searching Digital LDO with Transient Enhancement
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC), 2019This paper presents a digital LDO (DLDO) which using binary searching method for fast load tracking. A binary searching controller is designed to implement the-searching algorithm. An error cancellation module is designed to reduce steady-state error.
Zheyi Yuan, Shiquan Fan, Li Geng
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An Analog-Proportional Digital-Integral Multiloop Digital LDO With PSR Improvement and LCO Reduction
IEEE Journal of Solid-State Circuits, 2020This article presents a low-dropout regulator (LDO), with analog-proportional (AP) and digital integral (DI) controls. The design concerns are discussed at first, on how to improve the load transient response, enhance the power supply rejection (PSR), and reduce the limit cycle oscillation (LCO).
Mo Huang, Yan Lu, Rui P. Martins
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A fully-synthesizable 0.6V digital LDO with dual-loop control using digital standard cells
2016 14th IEEE International New Circuits and Systems Conference (NEWCAS), 2016A fully synthesizable digital low drop-out regulator (LDO) with dual (coarse/fine) loops control is proposed. This structure employs a synchronized comparator to compare the feedback voltage (Vfb) and the desired reference voltage (Vref). A coarse loop is used to simplify the control logic circuit and increase the LDO response speed during the output ...
Jun Liu, Nima Maghari
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Design of a near-threshold digital LDO with fast transient response
2014 International SoC Design Conference (ISOCC), 2014A near-threshold digital LDO (DLDO) with fast transient response is presented in this paper. In order to improve settling time, a voltage-controlled delay line (VCDL) with a new proposed delay cell is developed to enhance conversion gain. In addition, Vernier-delay-line-based time-to-digital convertor (TDC) is used to quantize phase from phase ...
null Yunsheng Chan, null Yingchieh Ho
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NBTI-Aware Digital LDO Design for Edge Devices in IoT Systems
2019 China Semiconductor Technology International Conference (CSTIC), 2019Digital low dropout voltage regulators (DLDOs) have been widely applied to emerging edge devices of IoT systems due to the benefit of simply designing, easily integrating to edge devices, and fast responding. Conventional DLDOs insert parallel pMOSs between V in and V out , and use a digital controller to turn on appropriate number of pMOSs to obtain ...
Yu-Guang Chen, Yu-Yi Lin
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Mitigation of NBTI induced performance degradation in on-chip digital LDOs
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018On-chip digital low-dropout voltage regulators (LDOs) have recently gained impetus and drawn significant attention for integration within both mobile devices and micro-processors. Although the benefits of easy integration and fast response speed surpass analog LDOs and other voltage regulator types, NBTI induced performance degradation is typically ...
Longfei Wang +3 more
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Asynchronous Domino Binary search Digital LDO
2021 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2021Wei-Bin Yang +3 more
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A Fully on-Chip Digitally Assisted LDO Regulator With Improved Regulation and Transient Responses
IEEE Transactions on Circuits and Systems I: Regular Papers, 2018This paper proposes a fully-on-chip mixed-mode low-dropout (LDO) regulator with regulation and transient response enhanced. A Miller compensation capacitor and a buffer stage are used to achieve stability and improve power MOS gate slew rate. The ultra-fast voltage buffer helps further improve the load transient recovery speed and reduce the chip area ...
Han Li, Chenchang Zhan, Ning Zhang
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