Results 31 to 40 of about 79 (77)
새로운 디지털 회로 기법들을 이용한 디지털 위상 동기화 루프와 클럭 및 데이터 복원 회로 설계 [PDF]
, 2019 학위논문(박사)--서울대학교 대학원 :공과대학 전기·정보공학부,2019. 8. 김재하.In this dissertation, various systematic vulnerabilities throughout the digital phase-locked loop (PLL) and clock and data recovery (CDR) circuitries are solved by employing novel digital / digital-driven ...
류시강
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7th ESACP Congress in Caen April 1–5, 2001
, 2001 Analytical Cellular Pathology, Volume 22, Issue 1-2, Page 1-101, 2001.
wiley +1 more source
A Low Voltage All-Digital Phase-Locked Loop Based on Differential Bootstrapped Ring Oscillator
, 2017 自從1930年第一個鎖相迴路 (Phase-Locked Loop, PLL) 被提出之後，鎖相迴路已有著十分廣泛的應用，如當作數位系統的時脈產生器 (Clock Generator)、通訊系統中的本地振盪器 (Local Oscillator)、時脈及資料恢復電路 (Clock and Data Re- covery, CDR)…等等。以上應用皆需要十分精準的頻率及相位同步，以滿足規格要求。所以設計一個適當操作頻率及頻寬，並具有低相位抖動 (Jitter)、低相位雜訊 (Phase Noise ...
Wei, Chi-Hao, 魏啟豪
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뱅뱅 위상검출기의 통계 수치를 이용한 올 디지털 위상 동기화 루프의 설계
, 2015 학위논문 (박사)-- 서울대학교 대학원 : 전기·컴퓨터공학부, 2015. 8. 정덕균.An all-digital phase-locked loop (ADPLL) and an all-digital spread spectrum clock generator (SSCG) are proposed using the stochastic data of the bang-bang phase-frequency detection.
장성천
core
International audienceA frequency-modulated continuous-wave (FMCW) chirp generator serves as the pivotal building block for short-range 3D imaging radar systems, which have been widely utilized in medical and security applications.
Zhou, Yuqian +9 more
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All-Digital Spread Spectrum Clock Generators
, 2010 In a PC system, the speed of the center process unit (CPU) improves continuously. If the I/O interface is not able to improve simultaneously, the performance of the PC system will be limited. Therefore, high-speed I/O interface are becoming popular.
林聖祐, Lin, Sheng-You
core
To unlock wide data-rates, wireless transceivers require ultra-Iow-jitter local-oscillators. Fractional-N PLLs achieve low-noise using a digital-to-time converter (DTC) to re-align the edges of the reference and divider signals in fractional mode (Fig. 1
Dartizio S. M. +6 more
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Design and Implementation of Low Jitter Clock Generators in Communication and Aerospace System
, 2016 The high demands on data processing and bandwidth in wireless/wireline communication and aerospace systems have been pushing forward circuit design techniques to their limitations to obtain maximum performances with respect to high operating frequency ...
Jung, Seok Min
core
An Overview of Phase-Locked Loop: From Fundamentals to the Frontier. [PDF]
Sensors (Basel)Nguyen TVH, Pham CK.
europepmc +1 more source