Results 21 to 30 of about 375,340 (303)
This paper presents a phase-locked loop (PLL) based resonator driving integrated circuit (IC) with automatic parasitic capacitance cancellation and automatic gain control.
Hyunwoo Heo +6 more
doaj +1 more source
On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-line [PDF]
This paper presents a CMOS 0,6μm mixed-signal MODEM ASIC for data transmission on the low-voltage power line. The circuit includes all the analog circuitry needed for input interfacing and modulation/demodulation (PLL-based frequency synthesis, slave ...
Domínguez Matas, Carlos +4 more
core +1 more source
This paper presents the design, simulation, and measurements of a low power, low phase noise 10.25–11.78 GHz LC digitally controlled oscillator (LC DCO) with extended true single phase clock (E-TSPC) frequency divider in 130 nm complementary metal–oxide ...
V. Macaitis, R. Navickas
semanticscholar +1 more source
This paper presents a 612–1152 MHz Injection-Locked Frequency Multiplier (ILFM). The proposed ILFM is used to send an input signal to a receiver in only the I/Q mismatch calibration mode. Adopting a Phase-Locked Loop (PLL) to calibrate the receiver
SungJin Kim +10 more
doaj +1 more source
A 5.5–7.5‐GHz band‐configurable wake‐up receiver fully integrated in 45‐nm RF‐SOI CMOS
This work investigates a 5.5–7.5‐GHz band‐configurable duty‐cycled wake‐up receiver (WuRX) fully implemented in a 45‐nm radio‐frequency (RF) silicon‐on‐insulator (SOI) complementary‐metal‐oxide‐semiconductor (CMOS) technology.
Rui Ma, Florian Protze, Frank Ellinger
doaj +1 more source
A Low Power All-Digital PLL With −40dBc In-Band Fractional Spur Suppression for NB-IoT Applications
This paper proposes a low-power fractional-N all-digital PLL (ADPLL) for the narrow-band Internet-of-Things applications. Multi-step lock controlling and oscillator tuning word coarse prediction algorithms help to accelerate the locking process to less ...
Na Yan +6 more
doaj +1 more source
In this paper, a compact, low-loss, dual-path phase-switched inductor suitable for millimeter-wave (mmWave) transceiver subblocks is proposed. The signal path through the structure is determined by the relative polarity of two differential excitation ...
Joe Baylon +4 more
semanticscholar +1 more source
Herein, we present a low-power cyclic Vernier two-step time-to-digital converter (TDC) that achieves a wide input range with good linearity. Since traditional approaches require a large area or high power to achieve an input range >300 ns, we solve ...
Van Nhan Nguyen +3 more
doaj +1 more source
Implementation of Quantum Key Distribution with Composable Security Against Coherent Attacks using Einstein-Podolsky-Rosen Entanglement [PDF]
Secret communication over public channels is one of the central pillars of a modern information society. Using quantum key distribution (QKD) this is achieved without relying on the hardness of mathematical problems which might be compromised by improved
Duhme, Jörg +7 more
core +4 more sources
DESIGN AND SIMULATION OF DIGITALLY CONTROLLED OSCILLATOR OF ADPLL
In biomedical implants, the RF transceivers require the low power and less size components for acquiring best results in frequency and phase controlling.
Sudhakiran Gunda +3 more
semanticscholar +1 more source

