Results 1 to 10 of about 367 (152)
Digitally Controlled Oscillator with High Timing Resolution and Low Complexity for Clock Generation [PDF]
This paper presents a digitally controlled oscillator (DCO) with a low-complexity circuit structure that combines multiple delay circuits to achieve a high timing resolution and wide output frequency range simultaneously while also significantly reducing
Duo Sheng +3 more
doaj +6 more sources
Comparison of System-Level Design Approaches on Different Types of Digitally-Controlled Ring-Oscillator [PDF]
This paper presents a comparative study between two different implementations of digitally-controlled-oscillators (DCOs), whcih is the DAC-based and the digital controller-based DCO in TSMC 65 nm CMOS technology.
Santthosh Selvaraj +2 more
doaj +4 more sources
Optimum Layout of Low Power LC-Based Digitally Controlled Oscillator for Bluetooth Low Energy in a 4G/5G LTE System [PDF]
This paper presents an optimum layout method of a low-power, digitally controlled oscillator (DCO) for a Bluetooth low-energy (BLE) transceiver in a 4G/5G LTE system.
Min-Su Kim, Sang-Sun Yoo
doaj +4 more sources
A 5.5–7.5‐GHz band‐configurable wake‐up receiver fully integrated in 45‐nm RF‐SOI CMOS
This work investigates a 5.5–7.5‐GHz band‐configurable duty‐cycled wake‐up receiver (WuRX) fully implemented in a 45‐nm radio‐frequency (RF) silicon‐on‐insulator (SOI) complementary‐metal‐oxide‐semiconductor (CMOS) technology.
Rui Ma, Florian Protze, Frank Ellinger
doaj +2 more sources
An optimized DCO with modified binary-weighted DCTLs based hybrid tuning banks for an E-band DPLL [PDF]
An optimized millimeter-wave digital controlled oscillator (DCO) in a 40-nm CMOS process is presented in this work. The coarse-tuning modules and medium-tuning modules of the DCO utilize modified binary-weighted digitally controlled transmission lines ...
Lu Tang +6 more
doaj +2 more sources
An ADPLL-Based GFSK Modulator with Two-Point Modulation for IoT Applications [PDF]
To establish ubiquitous and energy-efficient wireless sensor networks (WSNs), short-range Internet of Things (IoT) devices require Bluetooth low energy (BLE) technology, which functions at 2.4 GHz. This study presents a novel approach as follows: a fully
Nam-Seog Kim
doaj +2 more sources
Time-Domain ADPLL BPSK, QPSK, and 8PSK Demodulators
Time-domain all-digital-phase-locked-loop phase-shift-keying (PSK) demodulators are proposed for BPSK, QPSK, and 8PSK signals. The demodulator architectures are highly suitable for low-voltage nanoscale CMOS techology.
Phanumas Khumsat +3 more
doaj +2 more sources
An all-digital phase-locked loop (ADPLL) with a multiphase digitally controlled oscillator (DCO) incorporating the bootstrapped and interpolated schemes is proposed in this paper.
Jen-Chieh Liu, Yu-Ping Li
doaj +1 more source
A dual‐path signal‐superposition technique that can address issues which pose challenges in the designs of high speed I/Os with low electro‐magnetic interference/radiations (EMI/EMR) applications is proposed. This work demonstrates an output slew rate lower than 1 V/ns at data rate of hundreds of Mbps or above over PVT, without using huge on‐board ...
Xiaoyan Gui +6 more
wiley +1 more source
Abstract Direct RF sampling has been suggested as a solution for receivers that are flexible in frequency and across standards, while utilising only a single radio frequency front‐end. However there are concerns about their robustness in the presence of out‐of‐band and in‐band blockers.
Stephen Henthorn +2 more
wiley +1 more source

