Enhancement of power quality in grid-connected systems using a predictive direct power controlled based PV-interfaced with multilevel inverter shunt active power filter. [PDF]
Boopathi R, Indragandhi V.
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Mexican axolotl optimization algorithm with a recalling enhanced recurrent neural network for modular multilevel inverter fed photovoltaic system. [PDF]
Madavan R +5 more
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A non-isolated DITO high step up DC/DC converter with reduced voltage stress on power switches. [PDF]
Bahadori A +5 more
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Development of a handheld chlorophyll content detector on wheat and maize leaves based on RGB sensor. [PDF]
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High-Performance Multi-Level Inverter with Symmetry and Simplification. [PDF]
Shieh JJ, Hwu KI, Chen SJ.
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Bacterial reduction and temperature increase of titanium dental implant models treated with a 445 nm diode laser: an in vitro study. [PDF]
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Interleaved quartic high gain DC-DC converter. [PDF]
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Diode Clamped Multilevel Inverter Based on Arduino Microcontroller
2020 International Conference on Computer, Control, Electrical, and Electronics Engineering (ICCCEEE), 2021This paper presents a single-phase Neutral point diode clamped (NPC) inverter module. Consists of single-cell connected to three equal DC power supply. This inverter also contains several semiconductor switches in which the process of direct voltage is reversed to the alternative wave in the output.
Muneeb Mustafa Saad +5 more
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A new diode clamping multilevel inverter
APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285), 1999This paper proposes a new diode clamping multilevel Inverter, which gets rid of the need for series association of the clamping diodes in the conventional diode clamping multilevel inverter. The new diode clamping inverter utilizes the same number of switches and diodes as the conventional one for synthesizing an inverter of a given level.
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Design of Schottky-barrier diode-clamped transistor layouts
1973 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 1973Describes an approach to the design of Schottky-clamped integrated circuit transistor layouts. Three-dimensional distributed resistances are modeled using a grid of lumped resistors. A computer circuit analysis program is used to obtain a simple lumped equivalent circuit for the clamped transistor.
R.A. Heald, D.A. Hodges
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