An approach to Direct Memory Access module verification [PDF]
Труды Института системного программирования РАН, 2018 A method of direct memory access subsystem verification used for “Elbrus” series microprocessors has been described. A peripheral controller imitator has been developed in order to reduce verification overhead.
V. . Kutsevol +3 more
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Data acquisition with direct memory access [PDF]
Computer Science Journal of Moldova, 1999 This paper is concerned about using Direct Memory Access (DMA) transfer for real-time data acquisitions from a plug-in data acquisition board Aquarius DSP-1.
Iu. Guzun
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Direct Memory Access-Based Data Storage for Long-Term Acquisition Using Wearables in an Energy-Efficient Manner [PDF]
SensorsThis study introduces a lightweight storage system for wearable devices, aiming to optimize energy efficiency in long-term and continuous monitoring applications.
Cosmin C. Dobrescu +4 more
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Development of a high-performance in-memory database architecture for intelligent video surveillance in critical patient care [PDF]
Frontiers in Digital HealthObjectivesThis research aims to engineer a specialized, high-speed database architecture tailored for intelligent video surveillance in critical healthcare environments.
Ramesh Kumar Veerapaneni +3 more
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Optimization Method of Streaming Storage Based on GCC Compiler [PDF]
Jisuanji kexue, 2022 To solve the problem of cache pollution and mandatory loss caused by streaming memory access,some high-perfor-mance general-purpose processor platforms provide a dedicated path and supporting instructions for accessing memory directly without accessing ...
GAO Xiu-wu, HUANG Liang-ming, JIANG Jun
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vsocket:an RDMA-based Acceleration Method Compatible with Standard Socket [PDF]
Jisuanji kexue, 2023 In order to be compatible with Linux standard sockets and utilize RDMA to improve the performance of programs using sockets,this paper proposes to construct a middleware Viscore Socket adaptor,referred to as vsocket between the upper-la-yer application ...
CHEN Yunfang, MAO Haotian, ZHANG Wei
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System-Level Communication Performance Estimation for DMA-Controlled Accelerators
IEEE Access, 2021 The performance of a hardware accelerator is often limited by the communication bandwidth between local on-chip memories and DRAM across on-chip bus.
Sunwoo Kim +2 more
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Optimization of Communication Schemes for DMA-Controlled Accelerators
IEEE Access, 2021 The hardware accelerator controlled by direct memory access (DMA) is greatly influenced by the communication bandwidth from/to DRAM through on-chip buses. This paper proposes a novel performance estimation algorithm to optimize the communication schemes (
Jooho Wang +2 more
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PISA-DMA: Processing-in-Memory Instruction Set Architecture Using DMA
IEEE Access, 2023 Processing-in-memory (PIM) has attracted attention to overcome the memory bandwidth limitation, especially for computing memory-intensive DNN applications.
Won Jun Lee +3 more
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Optimization of Multi-Core Accelerator Performance Based on Accurate Performance Estimation
IEEE Access, 2022 Multicore accelerators have emerged to efficiently execute recent applications with complex computational dimensions. Compared to a single-core accelerator, a multicore accelerator handles a larger amount of communication and computation simultaneously ...
Sunwoo Kim +3 more
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