Results 31 to 40 of about 53 (48)
Two-Dimensional Materials, the Ultimate Solution for Future Electronics and Very-Large-Scale Integrated Circuits. [PDF]
Nanomicro LettQin L, Wang L.
europepmc +1 more source
Some of the next articles are maybe not open access.
A Low-Cost Reduced-Latency DRAM Architecture With Dynamic Reconfiguration of Row Decoder
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023Yi-Xin Guo, Hongbin Sun, Hang Wang
exaly
Understanding Latency Variation in Modern DRAM Chips
Performance Evaluation Review, 2016Onur Mutlu +2 more
exaly
In-DRAM Cache Management for Low Latency and Low Power 3D-Stacked DRAMs
Micromachines, 2019Ho Hyun Shin, Eui-Young Chung
exaly
DRAM-Latency Optimization Inspired by Relationship between Row-Access Time and Refresh Timing
IEEE Transactions on Computers, 2016Lee-Sup Kim +2 more
exaly
Design-Induced Latency Variation in Modern DRAM Chips
Proceedings of the ACM on Measurement and Analysis of Computing Systems, 2017Onur Mutlu +2 more
exaly
Controller Architecture for Low-Power, Low-Latency DRAM With Built-in Cache
IEEE Design and Test, 2017Cheng-Wen Wu +2 more
exaly