Design of high speed and low offset dynamic latch comparator in 0.18 µm CMOS process. [PDF]
PLoS ONE, 2014 The cross-coupled circuit mechanism based dynamic latch comparator is presented in this research. The comparator is designed using differential input stages with regenerative S-R latch to achieve lower offset, lower power, higher speed and higher ...
Labonnah Farzana Rahman +4 more
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An Analog-Assisted Digital LDO With Dynamic-Biasing Asynchronous Comparator [PDF]
IEEE Access, 2022 This paper presents a digital low-dropout regulator (DLDO) with three-level switching (TLS) and analog-assisted (AA) structure formed by dynamic-biasing asynchronous comparator, capacitive-coupling RC network and auxiliary power switch.
Yuet Ho Woo +5 more
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A low kickback fully differential dynamic comparator for pipeline analog‐to‐digital converters [PDF]
Engineering Reports, 2019 This study presents a fully differential dynamic comparator with low kickback noise, an effect caused by voltage variations in the regeneration nodes of these types of circuit.
Jose‐Angel Diaz‐Madrid +3 more
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A 0.9 V high‐speed dynamic bias latch‐type comparator employing a voltage‐controlled delay line [PDF]
Electronics LettersThis paper presents a novel dynamic bias latch‐type comparator combined with a voltage‐controlled delay line (VCDL), designed specifically for low‐power and low‐noise applications in high‐speed analog‐to‐digital converters (ADCs).
Feng Tai, Yige Liu, Puyi Bai, Qiang Li
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A 1.2-V 7.76-ENOB 1-MS/s single-ended SAR ADC in 65-nm CMOS for biomedical applications [PDF]
Scientific ReportsA successive approximation register analog-to-digital converter (SAR ADC) is a promising approach used in biomedical applications due to its energy-efficiency architecture with less complex hardware implementation. The core building blocks of SAR ADC are
Kawther I. Arafa +4 more
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Mokslas: Lietuvos Ateitis, 2013 The aim of the research was to determine the mechanical stabilityof angle measurement comparator’s system. Vibrations weremeasured at the significant points of the system for that purposeand dynamic characteristics of the system were established ...
Artūras Kilikevičius +2 more
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Design and Optimization of Double-Tail Dynamic Latch CMOS Comparator With Modified Widlar Current Source [PDF]
Journal of Electrical and Computer EngineeringThe comparator plays a vital role in analog-to-digital converters. In the emerging communication era, these converters are useful to connect the analog field to the digital field.
Tejender Singh, Suman Lata Tripathi
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An Accurate and Low-Complexity Offset Calibration Methodology for Dynamic Comparators [PDF]
Journal of Low Power Electronics and ApplicationsDynamic comparators play an important role in electronic systems, requiring high accuracy, low power consumption, and minimal offset voltage. This work proposes an accurate and low-complexity offset calibration design based on a capacitive load approach.
Juan Cuenca +4 more
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The Effects of Comparator Dynamic Capacitor Mismatch in SAR ADC and Correction
IEEE Access, 2018 This paper proposes a method of correcting the nonlinear parasitic capacitor of the input pair of comparator in successive approximations analog-to-digital converters (SAR ADCs).
Jian Luo +4 more
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High-Performance Dynamic Comparator
International Journal of Emerging Trends in Engineering Research, 2020 K V K V L +99 more
openalex +2 more sources