Results 21 to 30 of about 64,005 (305)
An HTS Quasi-One junction SQUID-based periodic threshold comparator for a 4-bit superconductive flash A/D converter [PDF]
, 1995 An all high-Tc periodic threshold comparator for application in a 4-bit superconductive A/D converter has been realized and tested. The theoretical threshold curve of the comparator is calculated and compared to the measured results.
Gerritsma, Gerrit J. +4 more
core +2 more sources
A low kickback fully differential dynamic comparator for pipeline analog‐to‐digital converters
Engineering Reports, 2019 This study presents a fully differential dynamic comparator with low kickback noise, an effect caused by voltage variations in the regeneration nodes of these types of circuit.
Jose‐Angel Diaz‐Madrid +3 more
doaj +1 more source
A 5-MHz 11-bit delay-based self-oscillating ΣΔ modulator in 0.025 mm2 [PDF]
, 2010 In this paper a self-oscillating Sigma Delta modulator is presented. By introducing this self-oscillation in the system, the loop filter operates at a speed significantly lower than dictated by the clock frequency.
De Vuyst, Bart, Rombouts, Pieter
core +1 more source
Monolithic Si-Based AlGaN/GaN MIS-HEMTs Comparator and Its High Temperature Characteristics
Applied Sciences, 2021 Monolithic GaN High Electron Mobility Transistor (HEMT)-integrated circuits are a promising application of wide band-gap materials. To date, most GaN-based devices behave as NMOS-like transistors. As only NMOS GaN HEMT is currently commercially available,
Fan Li +9 more
doaj +1 more source
Analogue to Digital and Digital to Analogue Converters (ADCs and DACs): A Review Update [PDF]
, 2016 This is a review paper updated from that presented for CAS 2004. Essentially, since then, commercial components have continued to extend their performance boundaries but the basic building blocks and the techniques for choosing the best device and ...
Pickering, J.
core +3 more sources
An Analog-Assisted Digital LDO With Dynamic-Biasing Asynchronous Comparator
IEEE Access, 2022 This paper presents a digital low-dropout regulator (DLDO) with three-level switching (TLS) and analog-assisted (AA) structure formed by dynamic-biasing asynchronous comparator, capacitive-coupling RC network and auxiliary power switch.
Yuet Ho Woo +5 more
doaj +1 more source
Dynamics of a Carriage System of Comparator for Calibrating the Line Standards of Length
The Journal of Engineering Research, 2015 This paper presents research dynamic properties of a calibration comparator which is used to calibrate high precision line standards of length. For this purpose, multi-body dynamic and mathematical models of a carriage system of the comparator were ...
A. Kilikevičius +2 more
doaj +1 more source
IEEE Access, 2021 A 12-bit 80 MS/s hybrid type analog-to-digital converter (ADC) for high sampling speed and low power applications is presented in this paper. It has a subranging architecture with a front end of 6-bit Flash ADC with five channels of 6-bit time ...
Deeksha Verma +11 more
doaj +1 more source
A low-power reconfigurable ADC for biomedical sensor interfaces [PDF]
, 2009 This paper presents a 12-bit low-voltage low-power reconfigurable Analog-to-Digital Converter (ADC). The design employs Switched Capacitor (SC) techniques and implements a Successive Approximation (SA) algorithm.
Delgado Restituto, Manuel +3 more
core +1 more source
Introduction: towards dynamic comparative analysis
Anthropology of food, 2014 Comparison is at the heart of social sciences, and the study of ‘other’ culinary cultures is as old as the study of food practices – as a privileged and enduring object of anthropology. More recently, the cross-national comparison of food habits has received a new impulse from other quarters, as the association of eating habits with public health ...
Darmon, Isabelle, Warde, Alan
openaire +4 more sources