Results 51 to 60 of about 17,945 (167)
Design of Ultra-Low-Power Rail-to-Rail Input Common Mode Range Standard-Cell-Based Comparators
Journal of Low Power Electronics and ApplicationsIn this paper, a NOR2 standard-cell-based dynamic comparator providing rail-to-rail input common mode range (ICMR) is presented, together with a novel standard-cell oriented design methodology.
Antonio Manno +2 more
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A study on propagation delay and power dissipation of a 2-bit CMOS magnitude comparator with critical path evaluation [PDF]
E3S Web of ConferencesThis work presents the design of 2-bit magnitude comparator in Cadence Virtuoso tool using gpdk090 technology. The detailed analysis of propagation delay and power dissipation (both dynamic and static power) for its outputs—L (A < B), E (A = B), and G (A
Manudeep Tirunagari +5 more
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Performance Analysis Of Mono-bit Digital Instantaneous Frequency Measurement (Difm) Device [PDF]
AUT Journal of Electrical Engineering, 2017 Instantaneous Frequency Measurement (IFM) devices are the essential parts of anyESM, ELINT, and RWR receiver. Analog IFMs have been used for several decades. However, thesedevices are bulky, complex and expensive.
Y. Norouzi, H. Shahbazi, S. Mirzaei
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AN EFFICIENT FULLY DIFFERENTIAL VOLTAGE COMPARATOR [PDF]
Journal of Engineering Science and Technology, 2018 With the compactness of the devices, the circuits are required with less delay, less area and less power consumption. An efficient fully digital-in-notion differential voltage comparator with the opamp-less approach is implemented in this paper.
ASHIMA GUPTA, ALPANA AGARWAL
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The Effects of Comparator Dynamic Capacitor Mismatch in SAR ADC and Correction
IEEE Access, 2018 This paper proposes a method of correcting the nonlinear parasitic capacitor of the input pair of comparator in successive approximations analog-to-digital converters (SAR ADCs).
Jian Luo +4 more
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RADIATION HARDNESS ENSURING OF ANALOG INTEGRATED CIRCUITS
Доклады Белорусского государственного университета информатики и радиоэлектроники, 2019 Influence of gamma radiation Co60 on static and dynamic characteristics of the transresistance amplifier and the comparator realized on the master slice array «ABMK 1-3» is considered taking into account formulated design rule.
O. V. Dvornikov +4 more
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EURASIP Journal on Advances in Signal ProcessingThe low-resolution aware linear minimum mean squared error (LRA-LMMSE) channel estimator, designed for low-resolution MIMO receivers, achieves a notable reduction in mean squared error by incorporating a comparator network.
Luiz Sampaio, Lukas T. N. Landau
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A New Design Optimization Methodology of Fully Differential Dynamic Comparator [PDF]
Informacije MIDEM, 2023 L. Khanfir, J. Mouine
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A 30fJ/comparison dynamic bias comparator
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference, 2017 A dynamic bias pre-amplifier based latch type comparator is designed in a 65nm CMOS process. Its performance is compared with the double-tail latch-type comparator fabricated on the same chip in terms of energy consumption, input referred noise and speed.
Harijot Singh Bindra +3 more
openaire +2 more sources
A 10‐bit 13.3 µW single‐slope analog‐to‐digital converter with auto‐zero power‐down technique
Electronics LettersThis letter presents a low‐power single‐slope analog‐to‐digital converter (ADC) for column‐parallel architectures. A simple and effective design technique is proposed to solve the input‐dependent power consumption problem of the conventional single‐slope
Youngwoo Lee, Suhwan Kim, Jaehoon Jun
doaj +1 more source