Results 291 to 300 of about 81,341 (318)
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2012
Obtaining sub-20 nm lithography is not straightforward, even using a good tool with a sub-5 nm beam size. In this section, a brief overview of the various topics that will be covered in more depth in the rest of the chapter is given.
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Obtaining sub-20 nm lithography is not straightforward, even using a good tool with a sub-5 nm beam size. In this section, a brief overview of the various topics that will be covered in more depth in the rest of the chapter is given.
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The resolution of electron beam lithography
Microelectronic Engineering, 1992Abstract We present a model for the primary interaction of the electron beam with bound electrons in the resist. Time-dependent perturbation theory is used to calculate the probability that sites some distance from the electron beam will be exposed by the electromagnetic field around it.
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1986
To develop greater LSIs, it is necessary to increase the number of pattern elements per unit area by reducing circuit patterns. The increase of pattern elements per chip needs high-speed pattern writing. The electron-beam lithography system has stepped into the limelight as one of the systems for meeting the demand of fine and high-speed writing.
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To develop greater LSIs, it is necessary to increase the number of pattern elements per unit area by reducing circuit patterns. The increase of pattern elements per chip needs high-speed pattern writing. The electron-beam lithography system has stepped into the limelight as one of the systems for meeting the demand of fine and high-speed writing.
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Fabrication of Fractal Surfaces by Electron Beam Lithography
IEEE Transactions on Nanotechnology, 2010We describe a method based on electron beam lithography to fabricate patterns of fractal islands on a surface. The island morphology resembles that of a random deposition of particles in a diffusion-limited aggregation regime in 2-D, which is often encountered in the growth of atoms and molecules upon ultrahigh vacuum sublimation.
P Stoliar +3 more
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Scanning electron beam lithography
Proceedings, annual meeting, Electron Microscopy Society of America, 1983This paper discusses the role of scanning electron beam lithography in semiconductor microcircuit production and in the experimental fabrication of devices in the laboratory. It also describes the electron optical equipment developed for these applications.Electron beam lithography has found an important place in integrated circuit production through ...
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Workpiece charging in electron beam lithography
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena, 1994A major contribution to total overlay error can be pattern placement imprecision due to charging of the workpiece in electron beam lithography for mask manufacture. A first-generation, worst-case model is presented which indicates that an electron can experience quite a large placement error for a modest workpiece surface potential (100 nm/V).
R. Browning +4 more
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Multiple scattered electron-beam effect in electron-beam lithography
SPIE Proceedings, 1991The multiple electron beam scattering effect is studied experimentally in an electron optical column. This effect causes a serious problem on the critical dimension of LSI pattern when the whole area of a wafer is exposed to an electron beam. This paper discusses the quantitative analysis and a method of reducing this effect.
Norio Saitou, Fumio Murai, Teruo Iwasaki
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High voltage electron beam lithography
Microelectronic Engineering, 1983Abstract The advantage of high voltage electron beam lithography in submicron VLSI fabrication is outlined. Continuously-moving-stage EB systems with small deflection width are suited to high voltage electron beam machines. At 50 kV, the following experimental results were obtained: 1. (1) 0.75 μm lines of PMMA are formed on a 0.8 μm step. 2.
Makoto Yoshimi +3 more
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Electron beam lithography over topography
Microelectronic Engineering, 1996An investigation of electron beam lithography will be presented to structure resist over a topographical surface of a metallization layer. The investigation shows the influence of different accelerating voltages (2.5 and 20 kV) on resist profiles over topographical steps. Simulation methods are used to illustrate the experimental behaviour.
U. Jagdhold, L. Bauch, M. Böttcher
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Studying on electron beam lithography technology
2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443), 2002We have worked out a method to obtain T-gate structures of sub-micron size with the Leica VB-5HR e-beam lithography system, tri-layer resists, and several levels of dose assignments, and applied this method to make GaAs microwave and millimeter wave devices and integrated circuits.
Luo Siwei +4 more
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