Results 271 to 280 of about 128,644 (293)
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SMOS floor error impact and migation on ocean imaging
2015 IEEE International Geoscience and Remote Sensing Symposium (IGARSS), 2015SMOS is the acronym for the Soil Moisture and Ocean Salinity mission by the European Space Agency (ESA) [1]. Its single payload, the Microwave Imaging Radiometer using Aperture Synthesis (MIRAS), was successfully launched in November 2009 to provide a continuous flow of fully polarimetric brightness temperature images.
Israel Durán 0001 +5 more
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Error floors in the satellite and land mobile channels
IEEE Transactions on Communications, 1991In a satellite mobile channel (SMC) and land mobile channel (LMC) because of fading and nonlinear power amplifiers, constant envelope modulation and noncoherent detection methods may outperform other schemes. It is shown how to compute the error floor for four noncoherent digital communication systems in satellite and land mobile channels. Differential
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Lowering the Error Floor of Turbo Codes With CRC Verification
IEEE Wireless Communications Letters, 2016Decoding performance of turbo codes can flatten at moderately high signal-to-noise ratio. This letter proposes a low complexity method for lowering this error floor. This method rests on the observation of the extrinsic information during the iterative decoding process. A set of $ {q}$ most unreliable bits are identified based on their associated
Thibaud Tonnellier +5 more
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Error floor mechanisms in indoor digital portable communications
[1992 Proceedings] The Third IEEE International Symposium on Personal, Indoor and Mobile Radio Communications, 2003By analytical derivation, supported by simulation, the authors develop a closed form theory of the error floor probability of differentially detected MSK in a slowly fading Rayleigh channel with small delay spread. As the major error source they identify the phase jitter generated by group delay bursts coinciding with the frequency deviation of the ...
Ilan Crohn +3 more
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A Method for Constructing LDPC Codes with Low Error Floor
2006 IEEE International Symposium on Information Theory, 2006This paper describes a novel Progressive Edge Growth (PEG) algorithm for constructing LDPC codes with minimized block error probability over the Binary Erasure Channel (BEC). The constructed codes provide superior performance and lower error floor compared to codes generated by previously known algorithms.
Eran Sharon, Simon Litsyn
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On interleaver design for BICM system with low error-floors
2015 International Conference on Information and Communication Technology Convergence (ICTC), 2015In this paper, we propose a design rule of a modified quasi-cyclic structure for bit-interleaved coded modulation with iterative decoding (BICM-ID). The proposed structure is especially favorable for low-complexity hardware implementation. In addition, it will be shown that the proposed structure effectively removes low-weight codewords, which in turn ...
Sangha Lee, Jeongseok Ha, Jaeyoon Lee
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Error Floor Estimation of LDPC Coded Modulation Systems Using Importance Sampling
IEEE Transactions on Communications, 2021Peyman Neshaastegaran +2 more
exaly
LDPC Codes with Low Error Floors and Efficient Encoders
ICC 2023 - IEEE International Conference on Communications, 2023Benjamin Gadat +3 more
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Error Floor Analysis of Coded Slotted ALOHA Over Packet Erasure Channels
IEEE Communications Letters, 2015Mikhail Ivanov +2 more
exaly
Spatially Coupled LDPC Codes With Small Constraint Length and Low Error Floor
IEEE Communications Letters, 2020Sima Naseri, Amir H Banihashemi
exaly

