Results 251 to 260 of about 620,630 (306)

Fault Density, Fault Depth and Fault Multiplicity: The Reward of Discernment

2019 IEEE 19th International Conference on Software Quality, Reliability and Security Companion (QRS-C), 2019
Using a semantics-based definition of faults, we discuss three distinct but related concepts, and illustrate their differences by means of simple experiments: fault density (number of faults in a program); fault depth (the minimal number of fault removals needed to make a program correct); and fault multiplicity (the number of atomic changes needed to ...
Besma Khaireddine, Aleksandr Zakharchenko, Ali Mili 0001   +2 more
openaire   +1 more source

Generalization of independent faults for transition faults

Digest of Papers. 1992 IEEE VLSI Test Symposium, 2003
Independent faults were shown to he effective in computing small test sets for stuck-at faults. An efficient procedure for computing a maximal set of independent stuck-at faults is proposed. The notion of independent faults is then extended to other fault models, specifically, transition faults, that require two-pattern tests.
Irith Pomeranz, Sudhakar M. Reddy
openaire   +1 more source

A parameterizable fault simulator for bridging faults

Proceedings IEEE European Test Workshop, 2002
We present the concept of a multiple-valued logic simulator that is able to more accurately determine the possible behavior of a circuit in the presence of bridging faults. By a user defined mapping of a range of voltages to a logic value the simulator takes care of certain voltages more closely than common bridge fault simulators that map all voltages
Piet Engelke, Bernd Becker 0001, Martin Keim   +2 more
openaire   +1 more source

On Fault Representativeness of Software Fault Injection

IEEE Transactions on Software Engineering, 2013
The injection of software faults in software components to assess the impact of these faults on other components or on the system as a whole, allowing the evaluation of fault tolerance, is relatively new compared to decades of research on hardware fault injection.
Roberto Natella, Domenico Cotroneo, João Durães, Henrique Madeira   +3 more
openaire   +2 more sources

Fault collapsing of multi-conditional faults

2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2013
Numerous new multi-conditional fault models have been proposed in the last years. In combination with the increasing complexity of today's designs these new fault models cause a tremendous increases of the ATPG-runtime. In this paper we present a novel fault collapsing scheme for multi-conditional faults.
Rene Krenz-Baath, Andreas Glowatz, Friedrich Hapke   +2 more
openaire   +1 more source

Fault Diagnosis and Fault Model Aliasing

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005
During fault diagnosis, the existence of equivalent faults, or faults that are not distinguished by the test set applied to the circuit, can create ambiguity as to the location of a defect. This happens if the circuit-under-test produces a response that matches the circuit response in the presence of two faults in different locations of the circuit ...
Irith Pomeranz, Srikanth Venkataraman, Sudhakar M. Reddy   +2 more
openaire   +1 more source

Faults, Injection Methods, and Fault Attacks

IEEE Design & Test of Computers, 2007
An active attacker can induce errors during the computation of the cryptographic algorithm and exploit the faulty results to extract information about the secret key in embedded systems. We call this kind of attack a fault attack. Fault attacks can break an unprotected system more quickly than any other kind of side-channel attack such as simple power ...
Chong Hee Kim, Jean-Jacques Quisquater
openaire   +1 more source

Fault simulation of multiple faults in PLAs

[1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications, 2002
A novel approach is presented to the problem of the simulation of multiple crosspoint faults in PLAs (programmable logic arrays). An efficient algorithm is presented that makes use of concepts derived from the critical path method. To reduce memory allocation, the technique makes use of the minimal information set needed for exact analysis.
AMBANELLI M., FAVALLI M., DALPASSO, MARCELLO, OLIVO P., RICCO' B.   +4 more
openaire   +1 more source

Fault modeling and fault equivalence in CMOS technology

Journal of Electronic Testing, 1991
The need for greater reliability in the fault coverage of test sequences for VLSI circuits has led to the proposal for more accurate fault models and test pattern generation tools. Such improvements bring about a large increase in the fault list to be considered and in the CPU time needed to generate the test.
Marie-Lise Flottes, Christian Landrault, Serge Pravossoudovitch   +2 more
openaire   +1 more source

Generic Fault Modelling for Fault Injection

2011
Fault injection is a widely used experimental dependability validation method, with a vast amount of techniques and tools. Within the scope of MOGENTES, an EU 7th framework programme project, tools have been developed which implements three different fault injection techniques; hardware-implemented fault injection, software-implemented fault injection ...
Rickard Svenningsson, Henrik Eriksson, Jonny Vinter, Martin Törngren   +3 more
openaire   +1 more source