Results 51 to 60 of about 7,636,250 (277)
Advanced Functional Materials, EarlyView.A single‐step laser annealing strategy is presented for dual‐gate a‐IGZO TFTs. The steep thermal gradient induces graded oxygen doping in the channel and simultaneous WOx removal at the contacts, enabling concurrent interface and contact engineering.
Sihyeon Kwon +9 more
wiley +1 more source
The NAIL Accelerator Interface Layer for Low Latency FPGA Offload
IEEE AccessWe present the NAIL Accelerator Interface Layer, a framework for offloading accelerated computations to Field Programmable Gate Arrays served across the network.
Edward Grindley +8 more
doaj +1 more source
Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation
International Journal of Reconfigurable Computing, 2008 This paper discusses a pair of synthesis algorithms that optimise a SystemC design to minimise area when targeting FPGAs. Each can significantly improve the synthesis of a high-level language construct, thus allowing a designer to concentrate more on an ...
Johan Ditmar +2 more
doaj +1 more source
Design of FPGA-Based LZ77 Compressor With Runtime Configurable Compression Ratio and Throughput
IEEE Access, 2019 Data compression reduces the cost of data storage and transmission by decreasing the data size. Previous studies have improved system performance by adaptively choosing the compression ratio (CR) and throughput required for the system by using a trade ...
Seungdo Choi +6 more
doaj +1 more source
FPGA Based Real Time Simulations of the Face Milling Process
IEEE Access, 2020 The article presents a successful implementation of the milling process simulation at the Field-Programmable Gate Array (FPGA). By using FPGA, very rigorous Real-Time (RT) simulation requirements can be met.
Michal R. Mazur +2 more
doaj +1 more source
Advanced Functional Materials, EarlyView.Low‐frequency noise spectroscopy defines the resolvable conductance states of synaptic FeFETs by coupling read‐current fluctuation with usable dynamic range. The resulting noise‐limited bit precision establishes a universal, device‐agnostic reliability metric beyond the memory window, enabling quantitative benchmarking and rational design of high ...
Jaehong Park +12 more
wiley +1 more source
The Design of an Associative Processing system for Network Monitoring [PDF]
, 2000 This paper looks at the design of an embedded processor to be used for network traffic monitoring. This would operate on the stream of data between a network interface and a host computer.
Tripp, Gerald
core
Advanced Functional Materials, EarlyView.A scalable, solution‐processed WSe2/ZrO2‐x van der Waals heterostructure realizes a light‐induced field‐tunneling synapse (LIFTS) that activates exclusively under bright illumination, emulating the photopic adaptation of the human retina at the device level.
Kijeong Nam +10 more
wiley +1 more source
Frequency Synchronization for Wireless Networks using Field Programmable Gate Arrays [PDF]
, 2016 Final version published as: Markus Appel, Felix Wermke, Frank Winkler, Beate Meffert: Frequency Synchronization for Wireless Networks using Field Programmable Gate Arrays. In: 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)
Winkler, Frank +3 more
core +1 more source
Memristive‐Gated RC‐Delay Synaptic Transistors for Time‐Encoded Analog in‐Memory Computing
Advanced Functional Materials, EarlyView.A Memristive‐Gated Transistor for Time‐Encoded Analog In‐Memory Computing — By exploiting the RC delay of a self‐rectifying interface‐type memristor, nonlinear I–V distortion is structurally bypassed, enabling 3‐bit nonvolatile memory, spike‐timing‐based analog encoding, and hardware‐calibrated reservoir‐computing validation within a unified device ...
Yun‐Seo Shin +7 more
wiley +1 more source