Results 1 to 10 of about 4,481 (255)
Low-Resource Time-to-Digital Converters for Field Programmable Gate Arrays: A Review [PDF]
SensorsA fundamental aspect in the evolution of Time-to-Digital Converters (TDCs) implemented within Field-Programmable Gate Arrays (FPGAs), given the increasing demand for detection channels, is the optimization of resource utilization.
Diego Real, David Calvo
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Towards field-programmable photonic gate arrays [PDF]
Smart Photonic and Optoelectronic Integrated Circuits XXII, 2020 A version of this paper was presented at the OPTO conference in Photonics West ...
Aitor Lopez Hernández +2 more
exaly +3 more sources
FlexKA: A Flexible Karatsuba Multiplier Hardware Architecture for Variable-Sized Large Integers
IEEE Access, 2023 The Karatsuba algorithm is an effective way to accelerate large integer multiplications through recursive function calls. However, existing hardware implementations of Karatsuba multipliers are limited to fixed operand sizes.
Byeongmin Kang, Hyungmin Cho
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FPGA-Based Controller for a Hybrid Grid-Connected PV/Wind/Battery Power System with AC Load
Energies, 2021 The development and optimization of a hybrid system composed of photovoltaic panels, wind turbines, converters, and batteries connected to the grid, is first presented.
Mohamed Yassine Allani +3 more
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Optical Multi-Context Blind Scrubbing for Field Programmable Gate Arrays
IEEE Photonics Journal, 2020 This paper presents aproposal of a new optical multi-context blind scrubbing that can not only increase the soft-error tolerance of the configuration memory of field programmable gate arrays (FPGAs) but also support high-speed dynamic reconfiguration ...
Yusuke Takaki, Minoru Watanabe
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field-programmable gate array [PDF]
, 2000 In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of acquiring the information coming from a fast digitization of the signals generated in a drift chambers. The digitized signals are analyzed using an ad hoc real‐time algorithm implemented in the FPGA in order to reduce the data throughput coming from the ...
Gianluigi Chiarello +6 more
+5 more sources
Rapid prototyping mixed-signal development kit for tactile neural computing
Frontiers in Neuroscience, 2023 Intelligent sensor systems are essential for building modern Internet of Things applications. Embedding intelligence within or near sensors provides a strong case for analog neural computing.
Vasudev S. Mallan +4 more
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A detailed router for field-programmable gate arrays [PDF]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992 A detailed routing algorithm, called the coarse graph expander (CGE), that has been designed specifically for field-programmable gate arrays (FPGAs) is described. The algorithm approaches this problem in a general way, allowing it to be used over a wide range of different FPGA routing architectures. It addresses the issue of scarce routing resources by
Stephen Brown 0003 +2 more
openaire +1 more source
Design and Implementation of Asynchronous Processor on FPGA
IEEE Access, 2022 Low-power and fault-tolerant features for microprocessors have been recognized as two of the greatest concerns in applications for edge devices. In this study, we propose asynchronous circuit design techniques for field-programmable gate arrays (FPGA ...
Ziho Shin, Myeong-Hoon Oh
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Fast approximation of the top‐k items in data streams using FPGAs
IET Computers & Digital Techniques, 2023 Two methods are presented for finding the top‐k items in data streams using Field Programmable Gate Arrays (FPGAs). These methods deploy two variants of a novel accelerator architecture capable of extracting an approximate list of the topmost frequently ...
Ali Ebrahim, Jalal Khalifat
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