Various anti-fuse structures for field programmable gate arrays and programmable read-only memories [PDF]
The use of anti-fuses as programmable elements is becoming popular in field programmable gate arrays and programmable read-only memories. The characteristics of various structures of anti-fuses and compromise between performance and reliability will be ...
V. A. Petrovich +3 more
doaj +1 more source
Efficient architectures and power modelling of multiresolution analysis algorithms on FPGA [PDF]
This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.In the past two decades, there has been huge amount of interest in Multiresolution Analysis Algorithms (MAAs) and their applications.
Sazish, Abdul Naser
core +7 more sources
Optimization of 2-d lattice cellular automata for pseudorandom number generation [PDF]
This paper proposes a generalized approach to 2-d CA PRNGs – the 2-d lattice CA PRNG – by introducing vertical connections to arrays of 1-d CA. The structure of a 2-d lattice CA PRNG lies in between that of 1-d CA and 2-d CA grid PRNGs.
Quieta, M.T.R. +3 more
core +7 more sources
Technology mapping of heterogeneous lookup table based field programmable gate arrays [PDF]
A lot of work has been done over the last decade on the logic synthesis and technology mapping of field programmable gate arrays (FPGAs) based on a single size of lookup table (LUT).
Inuani, Maurice Kilavuka +1 more
core +1 more source
Field Programmable Gate Arrays (FPGAs) for Enhancing the Speed and Energy Efficiency of Quantum Dynamics Simulations [PDF]
We present the first application of field programmable gate arrays (FPGAs) as new, customizable hardware architectures that can be harnessed for the fast and energy-efficient calculation of quantum dynamics simulations of large chemical/material systems.
Jose, Rodriguez-Borbon +5 more
core +1 more source
Conducting functional control of field-programmable gate arrays
Approaches to accomplishing functional control of field-programmable gate arrays (FPGA) are described. The first part of the article describes the existing equipment that allows conducting functional tests of FPGAs.
A. A. Ogurtsov
doaj +1 more source
This paper presents a proposal for a four-context programmable optically reconfigurable gate array (PORGA) with a high-resolution reflective silver-halide holographic memory and a corresponding writer system.
Shinya Kubota, Minoru Watanabe
doaj +1 more source
Testing for the programming circuit of LUT-based FPGAs [PDF]
The programming circuit of look-up table based FPGAs consists of two shift registers, a control circuit and a configuration memory (SRAM) cell array. Because the configuration memory cell array can be easily tested by conventional test methods for RAMs ...
T. Inoue +9 more
core +1 more source
Post-Measurement Adjustment of the Coincidence Window in Quantum Optics Experiments
We report on an electronic coincidence detection circuit for quantum photonic applications implemented on a field-programmable gate array (FPGA), which records each the time separation between detection events coming from single-photon detectors.
Jaime Carine +6 more
doaj +1 more source
Exploring FPGA Logic Block Architecture for Reduced Configuration Memory
The reduction of reconfiguration delay, during the partial dynamic reconfiguration of FPGAs, is important. In this context, the bitstream compression technique is one of the widely used techniques. These compression techniques only minimize the size of
HUSSAIN, F. +3 more
doaj +1 more source

