Results 11 to 20 of about 11,759 (260)
Various anti-fuse structures for field programmable gate arrays and programmable read-only memories
Доклады Белорусского государственного университета информатики и радиоэлектроники, 2019 The use of anti-fuses as programmable elements is becoming popular in field programmable gate arrays and programmable read-only memories. The characteristics of various structures of anti-fuses and compromise between performance and reliability will be ...
V. A. Petrovich +3 more
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IEEE Photonics Journal, 2011 This paper presents a proposal for a four-context programmable optically reconfigurable gate array (PORGA) with a high-resolution reflective silver-halide holographic memory and a corresponding writer system.
Shinya Kubota, Minoru Watanabe
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Post-Measurement Adjustment of the Coincidence Window in Quantum Optics Experiments
IEEE Access, 2021 We report on an electronic coincidence detection circuit for quantum photonic applications implemented on a field-programmable gate array (FPGA), which records each the time separation between detection events coming from single-photon detectors.
Jaime Carine +6 more
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Exploring FPGA Logic Block Architecture for Reduced Configuration Memory
Advances in Electrical and Computer Engineering, 2022 The reduction of reconfiguration delay, during the partial dynamic reconfiguration of FPGAs, is important. In this context, the bitstream compression technique is one of the widely used techniques. These compression techniques only minimize the size of
HUSSAIN, F. +3 more
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Performance Analysis of Nanoelectromechanical Relay-Based Field-Programmable Gate Arrays
IEEE Access, 2018 The energy consumption of field-programmable gate arrays (FPGA) is dominated by leakage currents and dynamic energy associated with programmable interconnect.
Tian Qin +4 more
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Applied System Innovation, 2023 Modern computers’ network interface cards (NICs) are undergoing changes in order to handle greater data rates and assist with scaling problems caused by general-purpose CPU technology.
Sunkari Pradeep +4 more
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Programmable Clock Distribution Using Switching Matrices for Field Programmable Gate Arrays
IEEE AccessEvery digital systems using very large scale integration require clock distributions, for which a dedicated clock tree or a mesh clock is frequently used.
Ayumu Ogura +2 more
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Technology mapping of heterogeneous lookup table based field programmable gate arrays
, 1998 A lot of work has been done over the last decade on the logic synthesis and technology mapping of field programmable gate arrays (FPGAs) based on a single size of lookup table (LUT).
Inuani, Maurice Kilavuka +1 more
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, 2020 We present the first application of field programmable gate arrays (FPGAs) as new, customizable hardware architectures that can be harnessed for the fast and energy-efficient calculation of quantum dynamics simulations of large chemical/material systems.
Jose, Rodriguez-Borbon +5 more
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Mokslas: Lietuvos Ateitis, 2019 Metabolic P (MP) systems are a part of the infobiotics research field. The intravenous glucose tolerance test (IVGTT) MP system models glucose-insulin interactions.
Darius Kulakovskis
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