Results 11 to 20 of about 4,481 (255)
A Self-Timed Multipurpose Delay Sensor for Field Programmable Gate Arrays (FPGAs) [PDF]
Sensors, 2013 This paper presents a novel self-timed multi-purpose sensor especially conceived for Field Programmable Gate Arrays (FPGAs). The aim of the sensor is to measure performance variations during the life-cycle of the device, such as process variability ...
Carlos Gómez Osuna +2 more
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Interconnect Solutions for Virtualized Field-Programmable Gate Arrays
IEEE Access, 2018 Contemporary datacenters are enhancing their compute capacity, power efficiency, and processing latency by integrating field-programmable gate arrays (FPGA).
Sadegh Yazdanshenas, Vaughn Betz
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Conducting functional control of field-programmable gate arrays
Вестник Самарского университета: Аэрокосмическая техника, технологии и машиностроение, 2017 Approaches to accomplishing functional control of field-programmable gate arrays (FPGA) are described. The first part of the article describes the existing equipment that allows conducting functional tests of FPGAs.
A. A. Ogurtsov
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IEEE Photonics Journal, 2011 This paper presents a proposal for a four-context programmable optically reconfigurable gate array (PORGA) with a high-resolution reflective silver-halide holographic memory and a corresponding writer system.
Shinya Kubota, Minoru Watanabe
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Post-Measurement Adjustment of the Coincidence Window in Quantum Optics Experiments
IEEE Access, 2021 We report on an electronic coincidence detection circuit for quantum photonic applications implemented on a field-programmable gate array (FPGA), which records each the time separation between detection events coming from single-photon detectors.
Jaime Carine +6 more
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Exploring FPGA Logic Block Architecture for Reduced Configuration Memory
Advances in Electrical and Computer Engineering, 2022 The reduction of reconfiguration delay, during the partial dynamic reconfiguration of FPGAs, is important. In this context, the bitstream compression technique is one of the widely used techniques. These compression techniques only minimize the size of
HUSSAIN, F. +3 more
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Performance Analysis of Nanoelectromechanical Relay-Based Field-Programmable Gate Arrays
IEEE Access, 2018 The energy consumption of field-programmable gate arrays (FPGA) is dominated by leakage currents and dynamic energy associated with programmable interconnect.
Tian Qin +4 more
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Programmable Clock Distribution Using Switching Matrices for Field Programmable Gate Arrays
IEEE AccessEvery digital systems using very large scale integration require clock distributions, for which a dedicated clock tree or a mesh clock is frequently used.
Ayumu Ogura +2 more
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Applied System Innovation, 2023 Modern computers’ network interface cards (NICs) are undergoing changes in order to handle greater data rates and assist with scaling problems caused by general-purpose CPU technology.
Sunkari Pradeep +4 more
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Mokslas: Lietuvos Ateitis, 2019 Metabolic P (MP) systems are a part of the infobiotics research field. The intravenous glucose tolerance test (IVGTT) MP system models glucose-insulin interactions.
Darius Kulakovskis
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