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Low-Resource Time-to-Digital Converters for Field Programmable Gate Arrays: A Review [PDF]
SensorsA fundamental aspect in the evolution of Time-to-Digital Converters (TDCs) implemented within Field-Programmable Gate Arrays (FPGAs), given the increasing demand for detection channels, is the optimization of resource utilization.
Diego Real, David Calvo
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A Self-Timed Multipurpose Delay Sensor for Field Programmable Gate Arrays (FPGAs) [PDF]
Sensors, 2013 This paper presents a novel self-timed multi-purpose sensor especially conceived for Field Programmable Gate Arrays (FPGAs). The aim of the sensor is to measure performance variations during the life-cycle of the device, such as process variability ...
Carlos Gómez Osuna +2 more
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Towards field-programmable photonic gate arrays [PDF]
Smart Photonic and Optoelectronic Integrated Circuits XXII, 2020 A version of this paper was presented at the OPTO conference in Photonics West ...
Aitor Lopez, José Capmany
exaly +3 more sources
field-programmable gate array [PDF]
, 2000 In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of acquiring the information coming from a fast digitization of the signals generated in a drift chambers. The digitized signals are analyzed using an ad hoc real‐time algorithm implemented in the FPGA in order to reduce the data throughput coming from the ...
Gianluigi Chiarello +6 more
+6 more sources
FlexKA: A Flexible Karatsuba Multiplier Hardware Architecture for Variable-Sized Large Integers
IEEE Access, 2023 The Karatsuba algorithm is an effective way to accelerate large integer multiplications through recursive function calls. However, existing hardware implementations of Karatsuba multipliers are limited to fixed operand sizes.
Byeongmin Kang, Hyungmin Cho
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FPGA-Based Controller for a Hybrid Grid-Connected PV/Wind/Battery Power System with AC Load
Energies, 2021 The development and optimization of a hybrid system composed of photovoltaic panels, wind turbines, converters, and batteries connected to the grid, is first presented.
Mohamed Yassine Allani +3 more
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Empowering parallel computing with field programmable gate arrays [PDF]
, 2020 After more than 30 years, reconfigurable computing has grown from a concept to a mature field of science and technology. The cornerstone of this evolution is the field programmable gate array, a building block enabling the configuration of a custom hardware ...
D'Hollander, Erik
core +2 more sources
A detailed router for field-programmable gate arrays [PDF]
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992 A detailed routing algorithm, called the coarse graph expander (CGE), that has been designed specifically for field-programmable gate arrays (FPGAs) is described. The algorithm approaches this problem in a general way, allowing it to be used over a wide range of different FPGA routing architectures. It addresses the issue of scarce routing resources by
Stephen Brown 0003 +2 more
openaire +1 more source
Optical Multi-Context Blind Scrubbing for Field Programmable Gate Arrays
IEEE Photonics Journal, 2020 This paper presents aproposal of a new optical multi-context blind scrubbing that can not only increase the soft-error tolerance of the configuration memory of field programmable gate arrays (FPGAs) but also support high-speed dynamic reconfiguration ...
Yusuke Takaki, Minoru Watanabe
doaj +1 more source
Rapid prototyping mixed-signal development kit for tactile neural computing
Frontiers in Neuroscience, 2023 Intelligent sensor systems are essential for building modern Internet of Things applications. Embedding intelligence within or near sensors provides a strong case for analog neural computing.
Vasudev S. Mallan +4 more
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