Results 21 to 30 of about 7,636,250 (277)

Post-Measurement Adjustment of the Coincidence Window in Quantum Optics Experiments

open access: yesIEEE Access, 2021
We report on an electronic coincidence detection circuit for quantum photonic applications implemented on a field-programmable gate array (FPGA), which records each the time separation between detection events coming from single-photon detectors.
Jaime Carine   +6 more
doaj   +1 more source

Exploring FPGA Logic Block Architecture for Reduced Configuration Memory

open access: yesAdvances in Electrical and Computer Engineering, 2022
The reduction of reconfiguration delay, during the partial dynamic reconfiguration of FPGAs, is important. In this context, the bitstream compression technique is one of the widely used techniques. These compression techniques only minimize the size of
HUSSAIN, F.   +3 more
doaj   +1 more source

Performance Analysis of Nanoelectromechanical Relay-Based Field-Programmable Gate Arrays

open access: yesIEEE Access, 2018
The energy consumption of field-programmable gate arrays (FPGA) is dominated by leakage currents and dynamic energy associated with programmable interconnect.
Tian Qin   +4 more
doaj   +1 more source

Programmable Clock Distribution Using Switching Matrices for Field Programmable Gate Arrays

open access: yesIEEE Access
Every digital systems using very large scale integration require clock distributions, for which a dedicated clock tree or a mesh clock is frequently used.
Ayumu Ogura   +2 more
doaj   +1 more source

RETRACTED: Express Data Processing on FPGA: Network Interface Cards for Streamlined Software Inspection for Packet Processing

open access: yesApplied System Innovation, 2023
Modern computers’ network interface cards (NICs) are undergoing changes in order to handle greater data rates and assist with scaling problems caused by general-purpose CPU technology.
Sunkari Pradeep   +4 more
doaj   +1 more source

Step forward to map fully parallel energy efficient cortical columns on field programmable gate arrays [PDF]

open access: yes, 2014
This study presents energy and area-efficient hardware architectures to map fully parallel cortical columns on reconfigurable platform - field programmable gate arrays (FPGAs).
See, Chan H.   +2 more
core   +1 more source

Intraveninio gliukozės tolerancijos testo metabolinės P sistemos įgyvendinimas apibendrintuoju kombinaciniu būdu / Intravenous glucose tolerance test metabolic P system implemented using unified combinative technique

open access: yesMokslas: Lietuvos Ateitis, 2019
Metabolic P (MP) systems are a part of the infobiotics research field. The intravenous glucose tolerance test (IVGTT) MP system models glucose-insulin interactions.
Darius Kulakovskis
doaj   +1 more source

Method for Testing Field Programmable Gate Arrays [PDF]

open access: yes, 1999
A method of testing field programmable gate arrays (FPGAs) includes the step of configuring programmable logic blocks of the FPGAs for completing a built-in self-test.
Stroud, Charles E., Abramovici, Miron
core   +3 more sources

Digital Platform for Wafer-Level MEMS Testing and Characterization Using Electrical Response

open access: yesSensors, 2016
The uniqueness of microelectromechanical system (MEMS) devices, with their multiphysics characteristics, presents some limitations to the borrowed test methods from traditional integrated circuits (IC) manufacturing.
Nuno Brito   +6 more
doaj   +1 more source

A Tag Based Random Order Vector Reduction Circuit

open access: yesIEEE Access, 2020
Vector reduction is a very common operation to reduce a vector into a single scalar value in many scientific and engineering application scenarios. Therefore a fast and efficient vector reduction circuit has great significance to the real-time system ...
Yihua Huang   +4 more
doaj   +1 more source

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