Results 151 to 160 of about 11,359 (209)

Investigation of Noise and Resolution of Magnetic FinFET (MAG-FinFET)

open access: yesIEEE Sensors Journal
Khine Thandar Nyunt Swe   +2 more
openaire   +1 more source

Recent progress on field-effect transistor-based biosensors: device perspective. [PDF]

open access: yesBeilstein J Nanotechnol
Smaani B   +7 more
europepmc   +1 more source

High-density via RRAM cell with multi-level setting by current compliance circuits. [PDF]

open access: yesDiscov Nano
Hsieh YC   +6 more
europepmc   +1 more source
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Improving bulk FinFET DC performance in comparison to SOI FinFET

Microelectronic Engineering, 2009
The implementation of FinFET structure in bulk silicon wafers is very attractive due to low-cost technology and compatibility with standard bulk CMOS in comparison with silicon-on-insulator (SOI) FinFET. SOI and bulk FinFET were analyzed by a three-dimensional numerical device simulator.
Mirko Poljak, Tomislav Suligoj
exaly   +3 more sources

Comparison of SOI FinFETs and Bulk FinFETs

ECS Transactions, 2009
Bulk FinFETs and silicon-on-insulator (SOI) FinFETs were compared in terms of device structure, fundamental characteristics, speed characteristics, model, and application. Bulk FinFETs have shown several advantages over SOI FinFETs while keeping nearly the same scaling-down characteristics as those of SOI FinFETs.
Jong-Ho Lee   +3 more
openaire   +2 more sources

Indium Gallium Zinc Oxide FinFET Compared with Silicon FinFET

Journal of Nano Research, 2021
Indium gallium zinc oxide fin-field effect transistor (IGZO FinFET) characteristics are investigated and then compared with Zinc oxide fin-field effect transistor (ZnO FinFET) and the Silicon fin-field effect transistor (Si FinFET). This was done using 3D simulation. The threshold voltage for Si, ZnO, and IGZO is 0.75 V, 0.30 V and 0.05 V respectively.
Unopa Matebesi, Nonofo M.J. Ditshego
openaire   +1 more source

GC-eDRAM design using hybrid FinFET/NC-FinFET

Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Gain cell embedded DRAMs (GC-eDRAM) are a potential alternative for conventional static random access memories thanks to their attractive advantages such as high density, low-leakage, and two-ported operation. As CMOS technology nodes scale down, the design of GC-eDRAM at deeply scaled nanometer nodes becomes more challenging.
Ramin Rajaei   +4 more
openaire   +1 more source

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