Results 81 to 90 of about 12,597 (299)
In one exemplary embodiment, a programmable analog array (PAA) contains a configurable analog matrix having two floating-gate field effect transistors (FETs).
core
An Experimental High‐Throughput Approach for the Screening of Hard Magnet Materials
An entire workflow for the high‐throughput characterization and analysis of compositionally graded magnetic films is presented. Characterization protocols, data management tools and data analysis approaches are illustrated with test case Sm(Fe, V)12 based films.
William Rigaut +16 more
wiley +1 more source
An all‐in‐one analog AI accelerator is presented, enabling on‐chip training, weight retention, and long‐term inference acceleration. It leverages a BEOL‐integrated CMO/HfOx ReRAM array with low‐voltage operation (<1.5 V), multi‐bit capability over 32 states, low programming noise (10 nS), and near‐ideal weight transfer.
Donato Francesco Falcone +11 more
wiley +1 more source
This article demonstrates the effect of reverse gradient barrier layer and floating gate structure on DC and RF performance of GaN-based HEMTs. In terms of power characteristics, using reverse gradient barrier and floating gate, the GaN-HEMTs with Lg of ...
Ruipeng Lv +7 more
doaj +1 more source
Integration of Low‐Voltage Nanoscale MoS2 Memristors on CMOS Microchips
This article presents the first monolithic integration of nanoscale MoS2‐based memristors into the back‐end‐of‐line of foundry‐fabricated CMOS microchips in a one‐transistor‐one‐resistor (1T1R) architecture. The MoS2‐based 1T1R cells exhibit forming‐free, nonvolatile resistive switching with ultra‐low operating voltages, low cycle‐to‐cycle variability ...
Jimin Lee +16 more
wiley +1 more source
TRANSIT AND DC MODEL OF FLOATING GATE TRANSISTOR IN 90NM CMOS TECHNOLOGY
This thesis presents a new simulation model for floating gate transistor (FGMOS) in nanometer scale technology where the transistors suffer from non-negligible gate leakage current due to the very thin Silicon oxide (SiO2) layer. The new FGMOS simulation
Saheb, Zina
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Moiré band engineering in graphene/hexagonal boron nitride–based superlattices unlocks van Hove singularities (VHSs) for terahertz (THz) optoelectronics. Tuning the Fermi level near these singularities, associated with secondary neutrality points (SNPs), enhances the photothermoelectric response.
Leonid Elesin +16 more
wiley +1 more source
Floating-gate based trimmable current sources
One of the most crucial building blocks of an electronic system is the digital-to-analogue converter (DAC) which forms the interface between the digital and analogue component parts.
Sha, Sunay
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Optoelectronic synaptic devices based on solution‐processed molecular telluride GST‐225 phase‐change inks are demonstrated for three‐factor learning. A global optical signal broadcast through a silicon waveguide induces non‐volatile conductance updates exclusively in locally electrically flagged memristors.
Kevin Portner +14 more
wiley +1 more source
Ambiente de programação descrito em VHDL para célula de memória analógica do tipo Floating-Gate
Um ambiente de programação desenvolvido em VHDL para células de memória analógicas do tipo CMOS Floating-Gates é apresentado. Uma malha de controle digital compara o alvo pré-ajustado pelo usuário com o estado atual do Floating-Gate e através da ...
Fernando Cardoso Castaldo +1 more
doaj +1 more source

