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Floating Point Arithmetic

Microprocessors and Microsystems, 1979
So far all the binary numbers considered have been integers with a maximum of 16 bits. Thus it has only been possible to represent numbers in the range Open image in new window or Open image in new ...
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Floating Point Arithmetic in Future Supercomputers

The International Journal of Supercomputing Applications, 1989
Considerations in the floating-point design of a supercomputer are discussed. Particular attention is given to word size, hardware support for extended precision, format, and accuracy characteristics. These issues are discussed from the perspective of the Numerical Aerodynamic Simulation Systems Division at NASA Ames.
David H. Bailey   +3 more
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Floating Point Arithmetic

2016
Integers are represented on a computer in the form of signed binary numbers. Often 2-, 4- and 8-byte integers are available where a byte possesses eight binary digits. In many computers 4 bytes are the smallest available—addressable—unit of the memory. It may turn out that we can work with one- and 16-byte integers, too.
Gisbert Stoyan, Agnes Baran
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Floating-point on-line arithmetic: Algorithms

1981 IEEE 5th Symposium on Computer Arithmetic (ARITH), 1981
For effective application of on-line arithmetic to practical numerical problems, floating-point algorithms for on-line addition/subtraction and multiplication have been implemented by introducing the notion of quasi-normalization. Those proposed are normalized fixed-precision FLPOL (floating-point on-line) algorithms.
Osaaki Watanuki, Milos D. Ercegovac
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Floating Point Arithmetic

2012
There are many data processing applications (e.g. image and voice processing), which use a large range of values and that need a relatively high precision. In such cases, instead of encoding the information in the form of integers or fixed-point numbers, an alternative solution is a floating-point representation.
Jean-Pierre Deschamps   +2 more
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Parameterised floating-point arithmetic on FPGAs

2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221), 2002
This paper describes the parameterisation, implementation and evaluation of floating-point adders and multipliers for FPGAs. We have developed a method, based on the Handel-C language, for producing technology-independent pipelined designs that allow compile-time parameterisation of design precision and range, and optional inclusion of features such as
Allan Jaenicke, Wayne Luk
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Unum: Adaptive Floating-Point Arithmetic

2016 Euromicro Conference on Digital System Design (DSD), 2016
Usually, arithmetic units represent numeric data-types employing fixed-length representations. For instance, hardware representations of real numbers usually employ fixed-length formats defined by the IEEE Standard 754 (32-bit single-precision, 64-bit double-precision, , floating-point numbers).
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An IEEE floating point arithmetic implementation

1983 IEEE 6th Symposium on Computer Arithmetic (ARITH), 1983
This article describes some of the methods and algorithms used in an implementation of floating point arithmetic following (almost) the IEEE standard defined in (1). The description is more directly algorithm-oriented than the ‘Implementation Guide’ for this standard (2), since the latter does not treat an actual implementation.
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Analysis of Rounding Methods in Floating-Point Arithmetic

IEEE Transactions on Computers, 1977
The error properties of floating-point arithmetic using various rounding methods (including ROM rounding, a new scheme) are analyzed. Guard digits are explained, and the rounding schemes' effectiveness are evaluated and compared.
David J. Kuck   +2 more
exaly   +4 more sources

Floating-Point Arithmetic

2019
You already know about integer arithmetic; now we will introduce some floating-point computations. There is nothing difficult here; a floating-point value has a decimal point in it and zero or more decimals. We have two kinds of floating-point numbers: single precision and double precision.
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