Results 201 to 210 of about 16,570 (263)

Enhanced 3D Gaussian Splatting for Real-Scene Reconstruction via Depth Priors, Adaptive Densification, and Denoising. [PDF]

Sensors (Basel)
Shang H, Chen M, Feng K, Li S, Zhang Z, Xu S, Ren C, Xi J.   +7 more
europepmc   +1 more source

Multimodal-multiscale hybrid fusion network for automated esophageal cancer diagnosis. [PDF]

iScience
Lonseko ZM, Hayeso HH, Gan T, Yang J, Rao N.   +4 more
europepmc   +1 more source

Optimizing MobileNetV3 for multimodal eye gaze and emotion recognition via advanced pruning and quantisation techniques. [PDF]

Sci Rep
Habib G, Malik IA, Sharma S, Singh S, Kim J.   +4 more
europepmc   +1 more source

Lightweight Power-Line Visual Detection in Agricultural UAV Scenarios Based on an Improved YOLOv12n Model. [PDF]

Sensors (Basel)
Ge YT, Wang BJ, Sun S, Lan YB.
europepmc   +1 more source

An Edge-Enabled Lightweight LSTM for the Temperature Prediction of Electrical Joints in Low-Voltage Distribution Cabinets. [PDF]

Sensors (Basel)
Gui Y, Yin C, Liu R, Dai H, He L, Zhao J, Ma Q, Zhong C.   +7 more
europepmc   +1 more source

Floating Point Operations in Matrix-Vector Calculus. [PDF]

, 2004
openaire  

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FFT Implementation with Fused Floating-Point Operations

IEEE Transactions on Computers, 2012
This paper describes two fused floating-point operations and applies them to the implementation of fast Fourier transform (FFT) processors. The fused operations are a two-term dot product and an add-subtract unit. The FFT processors use "butterfly” operations that consist of multiplications, additions, and subtractions of complex valued data.
Earl E. Swartzlander, H. H. M. Saleh
openaire   +3 more sources

Accurate floating-point operation using controlled floating-point precision

Proceedings of 2011 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, 2011
Rounding and accumulation of errors when using floating point numbers are important factors in computer arithmetic. Many applications suffer from these problems. The underlying machine architecture and representation of floating point numbers play the major role in the level and value of errors in this type of calculations.
Ahmad M. Zaki, Mohamed H. El-Shafey, Ayman M. Bahaa-Eldin, Gamal M. Aly   +3 more
openaire   +1 more source

Accelerating Microblaze Floating Point Operations

2007 International Conference on Field Programmable Logic and Applications, 2007
The MicroBlaze processor serves in many FPGA designs as the central 32 bit CPU with access to the global off chip memory and peripherals. MicroBlaze provides FSL links for up to 8 coprocessors. We present two MicroBlaze designs. The first design works with 8 PicoBlaze-based accelerators for pipelined, single-precision floating point vector-oriented ...
Jiri Kadlec, Roman Bartosinski, Martin Danek   +2 more
openaire   +1 more source