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FFT Implementation with Fused Floating-Point Operations
IEEE Transactions on Computers, 2012This paper describes two fused floating-point operations and applies them to the implementation of fast Fourier transform (FFT) processors. The fused operations are a two-term dot product and an add-subtract unit. The FFT processors use "butterfly” operations that consist of multiplications, additions, and subtractions of complex valued data.
Earl E. Swartzlander Jr., Hani H. Saleh
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An accelerator for double precision floating point operations
We describe DPFPA (double precision floating point accelerator) an FPGA based coprocessor interfaced to the CPU through the PCI bus; it is conceived to accelerate the evaluation of double precision floating point operations. This coprocessor is based on two double precision floating point units: a pipelined adder and a pipelined multiplier. The work is
Giovanni Danese +4 more
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Analysis of floating point operations in microcontrollers
2011 Proceedings of IEEE Southeastcon, 2011The purpose of this paper is to identify the advantages of including a floating point hardware / a mathematical co-processor in microcontrollers used for critical floating point operations. Three different microcontrollers are considered: Renesas M16C/62P (CISC without FPU), ATMEGA1280 (RISC without MCU) and Renesas RX62N (CISC with FPU).
Aswin Ramakrishnan, James M. Conrad
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Approximate Floating-Point Operations With Integer Units by Processing in the Logarithmic Domain
Floating-point numbers represented using a hidden one can readily be approximately converted to the logarithmic domain using Mitchell's approximation. Once in the logarithmic domain, several arithmetic operations including multiplication, division, and ...
Oscar Gustafsson
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Area and Performance Tradeoffs in Floating-Point Divide and Square-Root Implementations
Floating-point divide and square root operations are essential to many scientific and engineering applications, and are required in all computer systems that support the IEEE floating-point standard.
Miriam Leeser
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Accelerating Microblaze Floating Point Operations
2007 International Conference on Field Programmable Logic and Applications, 2007The MicroBlaze processor serves in many FPGA designs as the central 32 bit CPU with access to the global off chip memory and peripherals. MicroBlaze provides FSL links for up to 8 coprocessors. We present two MicroBlaze designs. The first design works with 8 PicoBlaze-based accelerators for pipelined, single-precision floating point vector-oriented ...
Jiri Kadlec +2 more
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Semantics for exact floating point operations
[1991] Proceedings 10th IEEE Symposium on Computer Arithmetic, 2002Semantics are given for the four elementary arithmetic operations and the square root, to characterize what are termed exact floating point operations. The operands of the arithmetic operations and the argument of the square root are all floating point numbers in one format.
Bohlender, Gerd +3 more
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Accurate floating-point operation using controlled floating-point precision
Proceedings of 2011 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, 2011Rounding and accumulation of errors when using floating point numbers are important factors in computer arithmetic. Many applications suffer from these problems. The underlying machine architecture and representation of floating point numbers play the major role in the level and value of errors in this type of calculations.
Ahmad M. Zaki +3 more
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