Results 241 to 250 of about 260,838 (285)

Generation of floating point 2D scaling operators for FPGA

2016 IEEE 11th International Symposium on Applied Computational Intelligence and Informatics (SACI), 2016
This paper presents several architectures for an FPGA implementation of a matrix operator for geometric two dimensional scaling using floating point numbers. We have generated synthesizable VHDL implementations of the proposed architectures for several floating point precisions: half, simple and double.
Ovidiu Sicoe, Mircea Popa 0001
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Floating-Point Operations

2019
The Raspberry Pi is based on a system on a chip. This chip contains the quad-core ARM CPU that we have been studying along with a couple of coprocessors. In this chapter, we’ll be looking at what the floating-point unit (FPU) does. Some ARM documentation refers to this as the Vector Floating Point (VFP) to promote the fact that it can do some limited ...
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Floating Point Operation

1980
The range of numbers available in a digital computer word as discussed so far is strictly limited. A 32-bit number has a range of about 232 or 1010 numbers. If the numbers are regarded as integers, then it is necessary to scale many problems in order to represent fractions.
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Verification of the decimal floating-point square root operation

2014 19th IEEE European Test Symposium (ETS), 2014
Decimal floating-point is a relatively recent addition to the IEEE standard (IEEE Std 754-2008). There exist few verification techniques that can check whether software libraries or hardware designs are in compliance with the standard. Our work presents a verification method to verify implementations of the decimal floating-point square root operation.
Amr A. R. Sayed-Ahmed, Hossam A. H. Fahmy, Ulrich Kühne   +2 more
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A re-evaluation of the practicality of floating-point operations on FPGAs

Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No.98TB100251), 2002
The use of reconfigurable hardware to perform high precision operations such as IEEE floating point operations has been limited in the past by FPGA resources. We discuss the implementation of IEEE single precision floating-point multiplication and addition.
Walter B. Ligon III, Scott McMillan, Greg Monn, Kevin Schoonover, Fred Stivers, Keith D. Underwood   +5 more
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Computation of numerical algorithms with parametric floating point operators

Journal of Systems Architecture, 1997
Abstract The computation complexity of a large number of applications, makes useful the development of new design strategies both in the direction of correctness and reduction of computational time and size of the used devices. Since a large part of numerical algorithms involves the computation of polynomial expansions in terms of sum and products of
Massimo Bartolucci, Paolo Guazzoni, Giorgio Manfredi, Giacomo R. Sechi, Luisa Zetta   +4 more
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Generation of floating point 2D translation operators for FPGA

2015 IEEE 10th Jubilee International Symposium on Applied Computational Intelligence and Informatics, 2015
This paper presents an FPGA implementation of a matrix operator for geometric two dimensional translation. The generated architecture takes advantage of the particular form of the translation matrix, ignoring the null elements. We have generated architectures for floating point operators of half, simple, double precision.
Ovidiu Sicoe, Alexandru Amaricai, Mircea Popa 0001   +2 more
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Design issues in division and other floating-point operations

IEEE Transactions on Computers, 1997
Floating-point division is generally regarded as a low frequency, high latency operation in typical floating-point applications. However, in the worst case, a high latency hardware floating-point divider can contribute an additional 0.50 CPI to a system executing SPECfp92 applications. This paper presents the system performance impact of floating-point
Stuart F. Oberman, Michael J. Flynn
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Parameterizable floating-point library for arithmetic operations in FPGAs

Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes, 2009
Floating-point operations are an essential requisite in a wide range of computational and engineering applications that need good performance and high precision. Current advances in VLSI technology raised the density integration fast enough, allowing the designers to develop directly in hardware several floating-point operations commonly implemented in
Diego F. Sánchez, Daniel M. Muñoz, Carlos H. Llanos, Mauricio Ayala-Rincón   +3 more
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Static Analyses of the Precision of Floating-Point Operations

2001
Computers manipulate approximations of real numbers, called floating-point numbers. The calculations they make are accurate enough for most applications. Unfortunately, in some (catastrophic) situations, the floating-point operations lose so much precision that they quickly become irrelevant.
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