Results 241 to 250 of about 21,585 (298)

CF-DETR: a robust transformer-based framework for small-scale chili flower detection in industrial chili production systems. [PDF]

Front Plant Sci
Kuang M, Li X, Wu B, Liu D, Xiang Y, Liu F, Zou X, Xie F, Zhang Y, Li X.   +9 more
europepmc   +1 more source

A Review of Floating Photovoltaic Systems: Prospects, Challenges, and Sustainability Considerations. [PDF]

Glob Chall
Oeishee MH, Rahman MM.
europepmc   +1 more source

Memristive floating-point Fourier neural operator network for efficient scientific modeling. [PDF]

Sci Adv
Li J, Tian J, Lin Y, Zhou Z, Li Y, Gao B, Tang J, Chen J, He Y, Qian H, Wu H, Miao X.   +11 more
europepmc   +1 more source

An accelerator for double precision floating point operations

Eleventh Euromicro Conference on Parallel, Distributed and Network-Based Processing, 2003. Proceedings., 2003
We describe DPFPA (double precision floating point accelerator) an FPGA based coprocessor interfaced to the CPU through the PCI bus; it is conceived to accelerate the evaluation of double precision floating point operations. This coprocessor is based on two double precision floating point units: a pipelined adder and a pipelined multiplier. The work is
Giovanni Danese, Ivo De Lotto, Francesco Leporati, M. Scaricabarozzi, Alvaro Spelgatti   +4 more
openaire   +2 more sources

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FFT Implementation with Fused Floating-Point Operations

IEEE Transactions on Computers, 2012
This paper describes two fused floating-point operations and applies them to the implementation of fast Fourier transform (FFT) processors. The fused operations are a two-term dot product and an add-subtract unit. The FFT processors use "butterfly” operations that consist of multiplications, additions, and subtractions of complex valued data.
Earl E Swartzlander
exaly   +2 more sources

Analysis of floating point operations in microcontrollers

2011 Proceedings of IEEE Southeastcon, 2011
The purpose of this paper is to identify the advantages of including a floating point hardware / a mathematical co-processor in microcontrollers used for critical floating point operations. Three different microcontrollers are considered: Renesas M16C/62P (CISC without FPU), ATMEGA1280 (RISC without MCU) and Renesas RX62N (CISC with FPU).
James M Conrad
exaly   +2 more sources

Floating Point Operations

2005
Mi Lu
exaly   +4 more sources

Approximate Floating-Point Operations with Integer Units by Processing in the Logarithmic Domain

, 2021
Floating-point numbers represented using a hidden one can readily be approximately converted to the logarithmic domain using Mitchell's approximation. Once in the logarithmic domain, several arithmetic operations including multiplication, division, and ...
OSCAR Gustafsson
exaly   +2 more sources

Accelerating Microblaze Floating Point Operations

2007 International Conference on Field Programmable Logic and Applications, 2007
The MicroBlaze processor serves in many FPGA designs as the central 32 bit CPU with access to the global off chip memory and peripherals. MicroBlaze provides FSL links for up to 8 coprocessors. We present two MicroBlaze designs. The first design works with 8 PicoBlaze-based accelerators for pipelined, single-precision floating point vector-oriented ...
Jiri Kadlec, Roman Bartosinski, Martin Danek   +2 more
openaire   +1 more source