Results 11 to 20 of about 3,157,454 (357)
Linear Encodings of Bounded LTL Model Checking [PDF]
Logical Methods in Computer Science, 2006 We consider the problem of bounded model checking (BMC) for linear temporal logic (LTL). We present several efficient encodings that have size linear in the bound.
Armin Biere +4 more
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Model‐based validation of diagnostic software with application in automotive systems
IET Cyber-systems and Robotics, 2021 Software validation aims to ensure that a particular software product fulfils its intended purpose, and needs to be performed against both software requirement as well as its implementation (i.e. product). However, for diagnostic software (i.e.
Jun Chen, Ramesh S
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Formal Verification of Websites [PDF]
Electronic Notes in Theoretical Computer Science, 2008 AbstractIn this paper, a model for websites is presented. The model is well-suited for the formal verification of dynamic as well as static properties of the system. A website is defined as a collection of web pages which are semantically connected in some way. External web pages (which are related pages not belonging to the website) are treated as the
Sonia Flores +2 more
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Formal verification of neural agents in non-deterministic environments
Autonomous Agents and Multi-Agent Systems, 2021 We introduce a model for agent-environment systems where the agents are implemented via feed-forward ReLU neural networks and the environment is non-deterministic. We study the verification problem of such systems against CTL properties.
Michael E. Akintunde +3 more
semanticscholar +1 more source
Formal Verification, Engineering and Business Value [PDF]
Electronic Proceedings in Theoretical Computer Science, 2012 How to apply automated verification technology such as model checking and static program analysis to millions of lines of embedded C/C++ code? How to package this technology in a way that it can be used by software developers and engineers, who might ...
Ralf Huuck
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Formal Verification of Fault-Tolerant Hardware Designs
IEEE Access, 2023 Digital circuits for space applications can suffer from operation failures due to radiation effects. Error detection and mitigation techniques are widely accepted solutions to improve dependability of digital circuits under Single Event Upsets (SEUs) and
Luis Entrena +6 more
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SoK: Attacks on Industrial Control Logic and Formal Verification-Based Defenses [PDF]
European Symposium on Security and Privacy, 2020 Programmable Logic Controllers (PLCs) play a critical role in the industrial control systems. Vulnerabilities in PLC programs might lead to attacks causing devastating consequences to the critical infrastructure, as shown in Stuxnet and similar attacks ...
Ruimin Sun +3 more
semanticscholar +1 more source
A Survey of Smart Contract Formal Specification and Verification [PDF]
ACM Computing Surveys, 2020 A smart contract is a computer program that allows users to automate their actions on the blockchain platform. Given the significance of smart contracts in supporting important activities across industry sectors including supply chain, finance, legal ...
Palina Tolmach +4 more
semanticscholar +1 more source
Formal Verification of a Programmable Hypersurface [PDF]
, 2018 A metasurface is a surface that consists of artificial material, called metamaterial, with configurable electromagnetic properties. This paper presents work in progress on the design and formal verification of a programmable metasurface, the Hypersurface, as part of the requirements of the VISORSURF research program (HORIZON 2020 FET-OPEN).
Kouvaros, Panagiotis +11 more
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FIVER – Robust Verification of Countermeasures against Fault Injections
Transactions on Cryptographic Hardware and Embedded Systems, 2021 Fault Injection Analysis is seen as a powerful attack against implementations of cryptographic algorithms. Over the last two decades, researchers proposed a plethora of countermeasures to secure such implementations.
Jan Richter-Brockmann +4 more
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