Results 101 to 110 of about 111,958 (254)
Mit den heutigen Prozessoren, welche verschiedene Architekturen (CPU, GPU, FPGA) auf einem System vereinen wird die Partitionierung von Prozessen immer wichtiger.
Huber, Philipp, Rosenthal, Matthias
core +2 more sources
Kaleidoscopic Electromagnetic Wave Manipulation via a Universal Reconfigurable Metasurface Platform
A multidimensional reconfigurable metasurface enables independent control of the amplitude, phase, polarization, and spectral responses of reflected electromagnetic (EM) waves. Integrating spatial, polarization, and spectral manipulation within a single platform, it provides a versatile solution for intelligent EM systems, next‐generation wireless ...
Wanting Tong +9 more
wiley +1 more source
FPGA-based module for SURF extraction
We present a complete hardware and software solution of an FPGA-based computer vision embedded module capable of carrying out SURF image features extraction algorithm.
Jan Šváb (17188789) +4 more
core +2 more sources
FPGA Implementation of a Simple 3D Graphics Pipeline
Conventional methods for computing 3D projects are nowadays usually implemented on standard or graphics processors. The performance of these devices is limited especially by the used architecture, which to some extent works in a sequential manner.
Vladimir Kasik, Ales Kurecka
doaj +1 more source
Конвейерные устройства на FPGA [PDF]
Рассматриваются основные принципы конвейерной обработки. Кратко описывается архитектура FPGA и особенности построения на её основе конвейерных устройств.
Волошин, Дмитрий Николаевич +2 more
core
FPGA-based accelerator method for Edge Computing [PDF]
Edge computing helps radio-supported mobile systems to process computing tasks on the side ofservers. The proximity to an edge computing node avoids excessive latencies, which benefits the calculation ofreal-time algorithms. Special computing needs arise
Schulz, Peter, Sleahtitchi, Grigore
core +1 more source
A Schottky photodiode based on (Al0.14Ga0.86)2O3 was developed, in which the sensing and processing functions were temporally decoupled through bias voltage modulation. By integrating single‐pixel imaging with a reservoir computing architecture, a comprehensive intelligent vision system was constructed.
Hongbin Wang +10 more
wiley +1 more source
Characterization and Repetition Rate Locking of a 1 GHz Erbium‐Doped ZBLAN Waveguide‐Chip Comb Laser
A compact, erbium‐doped ZBLAN waveguide chip mode‐locked laser that self‐starts, delivers stable ultrashort pulses, and repetition rate locked to a 1 GHz radio‐frequency reference. The laser produces near transform‐limited 324 fs pulses and 12 nm bandwidth with low noise and long‐term stability, with potential applications in optical frequency ...
Wen Qi Zhang +4 more
wiley +1 more source
Memory Compact High-Speed QC-LDPC Decoder Based on FPGA
In this paper, two compact memory strategies for partially parallel QC-LDPC decoder architecture are proposed. By compacting several adjacent rows hard decisions and extrinsic messages into one memory entry, which not only reduces the number of memory ...
doaj +1 more source
A Scalable Platform for Massively Parallel Superconducting Single‐Photon Detection
One hundred independent superconducting nanowire detectors, each with efficiency up to 80.1–98.3%, are integrated into a single compact system operating below 2.1 K. This parallel architecture supports fully connected multi‐user quantum entanglement distribution, while its scalability opens new avenues in optical quantum computing, QKD networks ...
You Xiao +14 more
wiley +1 more source

