Results 81 to 90 of about 86,072 (259)
Cogent Engineering, 2018 Computation in engineering and science can often benefit from acceleration due to lengthy calculation times for certain classes of numerical models.
Junjie Gu, Attila Michael Zsaki
doaj +1 more source
High performance FPGA implementation of the mersenne twister
, 2008 Efficient generation of random and pseudorandom sequences is of great importance to a number of applications [4]. In this paper, an efficient implementation of the Mersenne Twister is presented. The proposed architecture has the smallest footprint of all
Shrutisagar Chandrasekaran +3 more
core +1 more source
Terahertz Channel Modeling, Estimation and Localization in RIS‐Assisted Systems
Advanced Electronic Materials, EarlyView.Reconfigurable intelligent surfaces have become a recent intensive research focus. Based on practical applications, channel strategies for RIS‐assisted terahertz wireless communication systems are categorized into three different types: channel modeling, channel estimation, and channel localization.
Hongjing Wang +9 more
wiley +1 more source
DISEÑO ASÍNCRONO DE LAS FUNCIONES DE TRANSFORMACIÓN DEL ALGORITMO THREEFISH-256.
Revista de Investigaciones Universidad del Quindío, 2014 Los sistemas digitales han crecido en complejidad y la velocidad del reloj aumenta continuamente, incrementando de la misma manera algunos problemas como el retraso de la señal de reloj, el rendimiento total del sistema y el consumo de potencia. Debido a
Nathaly Nieto Ramírez +1 more
doaj +1 more source
Design and Implementation of MC-CDMA Technique Using FPGA [PDF]
Engineering and Technology Journal, 2013 Multicarrier Code Division Multiple Access (MC-CDMA) is attractive technique for high speed wireless data transmission; it's a combination of Orthogonal Frequency Division Multiplexing (OFDM) and Code Division Multiple Access (CDMA).
il A. H. Hadi, Layla Hattim Abood
doaj +1 more source
RRAM Variability Harvesting for CIM‐Integrated TRNG
Advanced Electronic Materials, EarlyView.This work demonstrates a compute‐in‐memory‐compatible true random number generator that harvests intrinsic cycle‐to‐cycle variability from a 1T1R RRAM array. Parallel entropy extraction enables high‐throughput bit generation without dedicated circuits. This approach achieves NIST‐compliant randomness and low per‐bit energy, offering a scalable hardware
Ankit Bende +4 more
wiley +1 more source
International Journal of Prognostics and Health Management, 2015 For unmanned aerial systems (UAS) to be successfully deployed and integrated within the national airspace, it is imperative that they possess the capability to effectively complete their missions without compromising the safety of other aircraft, as well
Johann Schumann +5 more
doaj +1 more source
A prototype parallel multi-FPGA accelerator for SPICE CMOS model evaluation
, 2011 Due to ever increasing complexity of circuits, EDA tools and algorithms are demanding more computational power. This made transistor-level simulation a growing bottleneck in the circuit development process.
Maache, Ahmed
core
A committee machine gas identification system based on dynamically reconfigurable FPGA
, 2008 This paper proposes a gas identification system based on the committee machine (CM) classifier, which combines various gas identification algorithms, to obtain a unified decision with improved accuracy.
Amira, A +4 more
core +1 more source
Advanced Electronic Materials, EarlyView.Ising machines are emerging as specialized hardware solvers for computationally hard optimization problems. This review examines five major platforms—digital CMOS, analog CMOS, emerging devices, coherent optics, and quantum systems—highlighting physics‐rooted advantages and shared bottlenecks in scalability and connectivity.
Hyunjun Lee, Joon Pyo Kim, Sanghyeon Kim
wiley +1 more source