Results 61 to 70 of about 14,564 (222)
ABSTRACT With the continuous development of computer image processing, developing efficient and low‐power computing devices has become a key challenge. Memristors have integrated in‐situ storage and computing capabilities, making them an ideal choice for low‐power image processing computing architectures. However, current memristors are confronted with
Tengyu Li +4 more
wiley +1 more source
SPICE‐Compatible Compact Modeling of Cuprate‐Based Memristors Across a Wide Temperature Range
A physics‐guided compact model for YBCO memristors is introduced, incorporating carrier trapping, field‐induced detrapping, and a differential balance equation to describe their switching dynamics. The model is compared with experiments and implemented in LTspice, allowing realistic circuit‐level simulations.
Thomas Günkel +6 more
wiley +1 more source
SYNTHESIS OF FPGA ARCHITECTURES OF BLOCK LIFTING-BASED FILTER BANKS IN QUATERNION ALGEBRA (PART 1)
Nowadays the methodology for designing systems on a chip is based on highly parameterized IP components which provide a wide range of adjustment of costs in resources, fixed point arithmetic data formats and system performance for a specific target ...
E. V. Rybenkov, N. A. Petrovsky
doaj
Custom Scrubbing for Robust Configuration Hardening in Xilinx FPGAs
The usage of SRAM-based Field Programmable Gate Arrays on High Energy Physics detectors is mostly limited by the sensitivity of these devices to radiation-induced upsets in their configuration.
Raffaele Giordano +3 more
doaj +1 more source
Scan‐Path‐ and Initial‐State‐Dependent Superdomain Switching in (111)‐Oriented PZT
Scan trajectory and initial superdomain topology govern polarization switching in (111)‐oriented PZT. Automated AFM writing, pulsing experiments, and interferometric 3D‐PFM show that raster scans reproducibly stabilize ordered Type‐I stripe superdomains with constrained variant selection, whereas spiral trajectories generate frustrated mixed‐variant ...
Rama Vasudevan +11 more
wiley +1 more source
Synthesis of FPGA architectures of block lifting-based filter banks in quaternion algebra (part 2)
Nowadays the methodology for designing systems on a chip is based on highly parameterized IP (itellectual property) components which provide a wide range of adjustment of resources, fixed point arithmetic data formats, and system ...
E. V. Rybenkov, N. A. Petrovsky
doaj
This paper presents a lidar‐based sensor node design and a rule‐based state observer for edge‐based traffic participant tracking. Unlike other state‐of‐the‐art methods, this state observer enables real‐time, CPU‐only edge processing without relying on machine learning approaches.
Simon Schäfer +2 more
wiley +1 more source
Neuromorphic Denoising with Fully Analog Memristive In‐Memory Computing
This article borrows the concepts of episodic memory in human brains to experimentally implement a memristor‐based neuromorphic denoising process. A homogeneous memristor processing unit is experimentally demonstrated for both temporal storage and neural network computation, imitating the synapses in the human brain.
Daijing Shi +5 more
wiley +1 more source
Ising Solver Using Vertical NAND Flash Memory
Commercial V‐NAND flash memory is repurposed as a discrete‐time Ising solver by exploiting in‐memory current summation and read‐voltage‐controlled intrinsic noise. The system implements Hopfield neural‐network updates with simulated‐annealing‐like behavior, solving max‐cut problems with high accuracy and energy efficiency while using mass‐produced ...
Sung‐Ho Park +7 more
wiley +1 more source
Reliability and Quality of Complex Systems
Background. One of the leading directions in the development of direction-of-arrival estimation systems is the use of digital antenna arrays and super-resolution algorithms.
I.V. Peshkov +2 more
doaj +1 more source

