Results 51 to 60 of about 107,341 (255)
Dynamically reconfigurable hardware for embedded control systems [PDF]
, 2012 Paiz Gatica CV. Dynamically reconfigurable hardware for embedded control systems. Bielefeld: Universität; 2012.This thesis explores the use of dynamically reconfigurable hardware for the realisation of embedded control systems, using the most well-known ...
Paiz Gatica, Carlos Vladimir
core
Neuromorphic Near‐Sensor and In‐Sensor Computing Enabled by Next‐Generation Material‐Based Sensors
Advanced Science, EarlyView.This Review presents a structural framework that classifies neuromorphic sensing into near‐sensor and in‐sensor architectures, clarifying physical coupling between sensing and computation. The framework connects neural and synaptic device functions with recent advances in optical, mechanical, and chemical sensing, compares energy consumption and ...
Su Yeon Jung +7 more
wiley +1 more source
A prototype parallel multi-FPGA accelerator for SPICE CMOS model evaluation
, 2011 Due to ever increasing complexity of circuits, EDA tools and algorithms are demanding more computational power. This made transistor-level simulation a growing bottleneck in the circuit development process.
Maache, Ahmed
core +1 more source
Photonic‐Enabled Energy‐Efficient Transparent Neuromorphic Computing Devices: A Review
Advanced Science, EarlyView.Transparent photonic neuromorphic computing devices merge optics and brain‐inspired computing to overcome von Neumann bottlenecks with ultrafast, low‐energy processing. By exploiting transparent oxides, 2D materials, phase‐change materials, and hybrid heterostructures, these platforms enable photonic synapses, memory, and logic for see‐through edge ...
Shuvaraj Ghosh +8 more
wiley +1 more source
FPGA Implementations of Feed Forward Neural Network by using Floating Point Hardware Accelerators
Advances in Electrical and Electronic Engineering, 2014 This paper documents the research towards the analysis of different solutions to implement a Neural Network architecture on a FPGA design by using floating point accelerators.
Gabriele-Maria Lozito +3 more
doaj +1 more source
High performance FPGA implementation of the mersenne twister [PDF]
, 2008 Efficient generation of random and pseudorandom sequences is of great importance to a number of applications [4]. In this paper, an efficient implementation of the Mersenne Twister is presented. The proposed architecture has the smallest footprint of all
Shrutisagar Chandrasekaran +3 more
core +1 more source
Advanced Science, EarlyView.By leveraging strong antiferromagnetic coupling, radiation‐tolerant synthetic antiferromagnetic synaptic devices are developed. Their intrinsic nonlinearity emulates neuronal activation, while linear and symmetric conductance modulation mimics synaptic plasticity.
Mingxu Song +5 more
wiley +1 more source
Development of Integral Environment in Matlab/Simulink for FPGA
Advances in Electrical and Electronic Engineering, 2014 In this paper is presented realization of integral environment which consists of software and hardware components for the purpose of programming Altera DE boards.
Dejan Jokic +2 more
doaj +1 more source
The Journal of Engineering, 2020 Advanced metering infrastructure (AMI) plays a key role in power systems. Since smart meters and meter collectors are synchronised to the time synchronisation devices (TSDs) in the head end system (HES) of AMI, they are vulnerable to global positioning ...
Qian Bin +4 more
doaj +1 more source