Results 111 to 120 of about 289,843 (203)
Splatshop: Efficiently Editing Large Gaussian Splat Models
Abstract We present Splatshop, a highly optimized toolbox for interactive editing (selection, deletion, painting, transformation, …) of 3D Gaussian Splatting models. Utilizing a comprehensive collection of heuristic approaches, we carefully balance between exact and fast rendering to enable precise editing without sacrificing real‐time performance. Our
Markus Schütz +5 more
wiley +1 more source
On‐Chip Learning With Crossbar Arrays for Adaptive Edge Intelligence
Memristor crossbar arrays implemented on chip combines memory, computation, and learning. They allow for adapting the neural weights using the incoming sensor data. This architecture reduces data movement leading to low‐latency, energy‐efficient intelligence in edge while being reliability‐aware co‐design across devices, circuits, and algorithms that ...
Alex James
wiley +1 more source
FPGA Implementations of SVM Classifiers: A Review
FPGA Implementations of SVM Classifiers: A ...
S Afifi (16722666) +2 more
core
ABSTRACT This paper proposes a novel genetic algorithm‐based proportional–integral super‐twisting sliding mode control (GA‐PI‐ST‐SMC) strategy for the rotor‐side converter of a 1.5 MW doubly‐fed induction generator (DFIG) operating in marine renewable wind turbine (MRWT) systems.
Habib Benbouhenni +3 more
wiley +1 more source
ABSTRACT Induction motors (IMs) are widely used in industry for their robustness and cost‐effectiveness, yet their nonlinear and multivariable dynamics pose significant challenges for high‐performance speed control. Model Predictive Control (MPC) is a well‐established solution but suffers from limitations related to model accuracy and parameter ...
Asier del Rio +4 more
wiley +1 more source
An Investigation on FPGA based SAD Hardware
In this paper, we argue that the utilization of field-programmable gate array (FPGA) structures can improve the performance of embedded systems based on programmable processor cores.
Implementations Stephan Wong
core
This work constructs a radio‐frequency front‐end‐free hybrid code‐division and space‐division‐multiplexing wireless communication system built on programmable space‐time‐coding metasurfaces. Orthogonal pseudo‐random codes reliably separate overlapped multistream signals that share identical frequency, time, and spatial resources.
Yuzhen Chen +3 more
wiley +1 more source
An Investigation on FPGA based SAD Hardware
In this paper, we argue that the utilization of field-programmable gate array (FPGA) structures can improve the performance of embedded systems based on programmable processor cores.
Implementations Stephan Wong
core
Schematic diagram of the whale optimization algorithm (WOA)–optimized fuzzy proportional–integral–derivative (PID) controller. The WOA is employed to dynamically tune the scaling factor expressions and fuzzy control parameters (a(e)a(e), a(ec)a(ec), βpβp, βiβi), as well as the initial PID gains (kp0kp0, ki0ki0), based on the error (ee) and its ...
Xiaosong Tian +7 more
wiley +1 more source
Femtosecond‐Laser‐Induced Physical Unclonable Random Maze Structure for Storage‐Free Encryption
Femtosecond‐laser‐induced gold random maze structures serve as multimodal physical unclonable functions for storage‐free encryption. Their stochastic optical, electrical, and Raman responses are generated by plasmon‐assisted Marangoni formation and converted into AES‐compatible keys without permanent secret‐key storage, offering a portable route toward
Shiru Jiang +6 more
wiley +1 more source

