Results 11 to 20 of about 18,604 (310)
Simplified Second-Order Generalized Integrator - Frequency-Locked Loop [PDF]
Second-Order Generalized Integrator -- Frequency-Locked Loop (SOGI-FLL) is a popular technique available in the grid synchronization literature. This technique uses gain normalization in the frequency locked-loop.
Hafiz Ahmed, Mohamed Benbouzid
doaj +2 more sources
A grid frequency estimation method based on moving average filter half-tangent phase-locked loop
This paper proposes a half-tangent phase-locked loop (HTan-PLL) with a moving average filter (MAF) for estimating grid frequency. The proposed PLL utilizes a half-tangent phase detector (PD) and introduces MAF into the phase-locked loop to address ...
WANG Wenguo, ZHANG Ben
doaj +2 more sources
Robust optical injection locking to a 250 MHz frequency comb without narrow-band optical pre-filtering [PDF]
A semiconductor laser was injection locked to a single optical frequency comb mode with a dither-free phase locked loop.
Wu, D.S. +7 more
core +1 more source
Radar Waveform Generator with Fuzzy Frequency Regulation [PDF]
: The Phase-Locked Loop (PLL) is a common functional component in many electrical systems. Phase-locked loops (PLLs) are closed-loop feedback-driven devices producing a signal depending on the frequency and phase of reference sig-nal that comes in.
Ahmed Salem +2 more
doaj +1 more source
Proper synchronization of Distributed Generator with grid and its performance in grid-connected mode relies on fast and precise estimation of phase and amplitude of the fundamental component of grid voltage. However, the accuracy with which the frequency
Kalpeshkumar Rohitbhai Patil +1 more
doaj +1 more source
Integral‐type half‐tangent phase‐locked loop for more electric aircraft grids
In this paper, an integral‐type half‐tangent phase‐locked loop (IHTan‐PLL) is proposed for the varying‐frequency AC grids of more electric aircraft (MEA).
Yiyun Zhao +5 more
doaj +1 more source
Different from the conventional grid voltage feedforward, the capacitive voltage type full feedforward will not amplify high frequency harmonics, and it can eliminate the capacitor current control and simplify the controller design.
Ying Li +4 more
doaj +1 more source
Design and verification of data acquisition clock circuit based on dual-loop phase-locked loop
Background Digital measurement system based on ADCs (analog-to-digital converter) has higher requirement on the signal to noise ratio (SNR) of sampled data. Among all the factors, the jitter of sampling clock has the most prominent effect on SNR.
LIU Zhi +11 more
doaj +1 more source
Integrated Circuit Signal Generation and Detection Techniques for Microwave and Sub-Millimeter Wave Signals [PDF]
The unabated reduction of device feature sizes in semiconductor processes, particularly in complementary metal-oxide semiconductor (CMOS) processes, has served as the enabling factor behind integrated electronic systems of ever increasing complexity and ...
Bohn, Florian
core +1 more source
This paper presents a 0.46 mW and 2.4 GHz; All-Digital Phase-Locked Loop (ADPLL) through an Injection-Locked Frequency Multiplier (ILFM) and Continuous Frequency Tracking Loop (CFTL) circuitry for low power Internet-of-Thing (IoT) applications.
Muhammad Riaz Ur Rehman +14 more
doaj +1 more source

