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Distributed Frequency-Locked Loops for Wireless Networks

open access: yesIEEE Transactions on Communications, 2011
The establishment of a common frequency reference in a distributed wireless network is a critical factor in enabling any degree of node cooperation in communication and sensing functions. In this paper we introduce Distributed Frequency-Locked Loops (D-FLL's) to control the carrier frequencies of autonomous nodes with wireless communication ...
VARANESE, NICOLA   +2 more
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A frequency steered phase locked loop

1997 IEEE International Performance, Computing and Communications Conference, 1997
Voltage controlled oscillators (VCOs) implemented in digital VLSI IC (integrated circuit) technology typically have very poorly controlled centre frequencies and poor phase noise characteristics, thus severely limiting their use in phase locked loop (PLL) applications.
Martin T. Hill, Antonio Cantoni
openaire   +2 more sources

Asynchronously Controlled Frequency Locked Loop

2016 22nd IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), 2016
A frequency-locked loop (FLL) system typically employs synchronous digital counters to estimate the frequency discrepancy between the output of a local oscillator and an external reference clock. We present a novel FIFO-based frequency detector as an alternative to such counters.
Suwen Yang   +2 more
openaire   +1 more source

Frequency-Locked Loops in Electrical Power and Energy Systems: Equivalent or Different to Phase-Locked Loops?

IEEE Industrial Electronics Magazine, 2021
In the electrical power and energy (EPE) area, the traditional concept in designing the synchronization system of power converters is using the phase-locked loop (PLL) concept. An alternative way is using the frequency-locked loop (FLL) concept, which is also known as the adaptive notch filter, adaptive noise cancelation technique, gradient descent ...
Golestan, Saeed; id_orcid 0000-0002-8568-1612   +4 more
openaire   +2 more sources

A reconfigurable high-frequency phase-locked loop

Proceedings of the 20th IEEE Instrumentation Technology Conference (Cat. No.03CH37412), 2004
Reconfigurable phase-locked loops (PLLs) present the advantage of fast-frequency acquisition combined with narrow-noise bandwidth, since their parameters can be dynamically adjusted. High-frequency PLLs are generally implemented by means of analog circuits which are not easily reconfigured during operation.
Fernando Rangel de Sousa, Bernard Huyart
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A 50 MHz phase- and frequency-locked loop

IEEE Journal of Solid-State Circuits, 1979
A monolithic phase/frequency-locked loop has been developed for operation at up to 50 MHz. The loop combines wide capture range and narrow bandwidth, making it ideal for timing recovery in digital transmission systems. The 24-pin device features an electronically-tuned voltage-controlled LC oscillator and includes the input differentiation and full ...
R. Cordell   +3 more
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A Fractional Frequency Synthesizer Using Frequency Locked Loop

2007 14th IEEE International Conference on Electronics, Circuits and Systems, 2007
This paper presents a new architecture for wideband fractional frequency synthesizer. The architecture is based on frequency locked loop (FLL). Fractional division is implemented in this FLL by using two feedback loops which are having different frequency division ratio N and N+1.
A. V. Rejeesh, Pradip Mandal
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Frequency measurement using a frequency locked loop

2011 IEEE Energy Conversion Congress and Exposition, 2011
A phase locked loop method is proposed for fast estimation of utility grid frequency, for control and protection purposes in grid-connected power converters. Using a second order generalized integrator (SOGI) and a ‘novel’ frequency locked loop (nFLL), which makes the SOGI frequency adaptive, the proposed SOGI-nFLL detects small and large step changes ...
Zijun Luo   +3 more
openaire   +1 more source

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