Results 281 to 290 of about 1,337,750 (349)

Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors

IEEE Transactions on Electron Devices, 2018
The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements.
Enrico Zanoni, Gaudenzio Meneghesso, Fabrizio Masin   +2 more
exaly   +2 more sources

FinFET-a Self-Aligned Double-Gate MOSFET Scalable to 20 nm

IEEE Transactions on Electron Devices, 2000
Jeffrey Bokor, Chenming Hu, J Kedzierski
exaly   +2 more sources

Warped gates

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013
With the widespread adoption of GPGPUs in varied application domains, new opportunities open up to improve GPGPU energy efficiency. Due to inherent application-level inefficiencies, GPGPU execution units experience significant idle time. In this work we propose to power gate idle execution units to eliminate leakage power, which is becoming a ...
Mohammad Abdel-Majeed, Daniel Wong 0001, Murali Annavaram   +2 more
openaire   +1 more source

Gating or de-gating? The rise of the gated village in Beijing

Habitat International, 2019
Abstract Urban gated communities have become increasingly common worldwide in both academic and policy discourse over recent decades. In contrast, gated communities in rural areas, a newer phenomenon, are rarely analyzed. This paper focuses on the unique phenomenon of gated villages that have emerged in the Beijing metropolitan area.
Shuhai Zhang, Guo Zheng
openaire   +1 more source

Parallel programming of an ionic floating-gate memory array for scalable neuromorphic computing

Science, 2019
Ionic floating-gate memories Digital implementations of artificial neural networks perform many tasks, such as image recognition and language processing, but are too energy intensive for many applications.
E. Fuller, S. Keene, A. Melianas, Zhong-Rui Wang, S. Agarwal, Yiyang Li, Yaakov Tuchman, C. D. James, M. Marinella, J. J. Yang, A. Salleo, A. Talin   +11 more
semanticscholar   +1 more source

A Novel Gate Resource Allocation Method Using Improved PSO-Based QEA

IEEE transactions on intelligent transportation systems (Print), 2020
With the continuous and rapid growth of air traffic demand, gate resource becomes a major bottleneck restricting airport development. Rational gate allocation is regarded as one of the most important means to solve this bottleneck.
W. Deng, Junjie Xu, Hui-Min Zhao, Ying-Jie Song   +3 more
semanticscholar   +1 more source

A 10K-Gate CMOS Gate Array Based on a Gate Isolation Structure

IEEE Journal of Solid-State Circuits, 1985
This paper describes an effect of the "gate isolation" technique and its application to a 10K-gate CMOS gate-array VLSI chip. This gate array is fabricated using a 2-/spl mu/m n-well CMOS technology, with double-level metallization. As an example, a 32-bit parallel array multiplier is designed using a fully automatic CAD system.
K. Sakashita, M. Ueda, T. Arakawa, S. Asai, T. Fujimura, I. Ohkura   +5 more
openaire   +1 more source

The guardians at the gate

Trends in Immunology, 2002
Abstract The EuroConference ‘Interactions Between Innate and Adaptive Immunity in Mammalian Defense Against Bacterial Infections’ was held at Gohren-Lebbin/Land Fleesensee, Germany from 5–8 June 2002.
Robert S, Jack, Christine, Schütt, Barbara M, Bröker   +2 more
openaire   +2 more sources

Ionic pores, gates, and gating currents

Quarterly Reviews of Biophysics, 1974
The current phase of axon physiology began with the invention of the voltage clamp by Cole (1949) and its use by Hodgkin & Huxley (1952d) to produce an astonishingly complete analysis of the ionic permeabilities that are responsible for the action potential.
openaire   +2 more sources